Nvmimg_cc in a GMSL2 setup, AGX GMSL2 deserializer configuration example

Autonomous Vehicles DRIVE AGX Xavier DRIVE AGX Xavier General
1

Please provide the following info (check/uncheck the boxes after clicking “+ Create Topic”):
Software Version
DRIVE OS Linux 5.1.6.1
DRIVE OS Linux 5.2.0 and DriveWorks 3.5
NVIDIA DRIVE™ Software 10.0 (Linux)
NVIDIA DRIVE™ Software 9.0 (Linux)
other DRIVE OS version
other

Target Operating System
Linux
QNX
other

Hardware Platform
NVIDIA DRIVE™ AGX Xavier DevKit (E3550)
NVIDIA DRIVE™ AGX Pegasus DevKit (E3550)
other

SDK Manager Version
1.5.0.7774
other

Host Machine Version
native Ubuntu 18.04
other

Hello nVIDIA experts,

I need to build a demonstration system with nVIDIA Drive AGX and a GMSL2 sink. The GMSL2 sink is propriatery HW, nothing you can buy on the market. And it is not a camera. However I’m familiar with GMSL2 and I have all datasheets and information about the GMSL2 Serializer. I know how to set up GMSL2 links, I know how to set up the sink, including the Serializer side of the GMSL2 link.

We plan to use nvmimg_cc for the demonstration.
I have been able to start the Deserializer on AGX in GMSL2 mode and establish a connection to the sink (a GMSL2 serializer). I have positive VIDEO_LOCK status and no errors or overflows in the AGX Deserializer. But nvmimg_cc times out, indicating that it does not see any CSI Frame Start/Frame End packets.
The configuration scripts I have seen in ddpx-a use the AGX deserializer all use GMSL1 mode.

So my main question:
Is there an example configuration script that shows how to set up the AGX deserializer in GMSL2 mode which I can take as a reference? If yes, where can I find it or how can I get it?

Thanks
Pirmin

2

Hi @pirmin_weisser ,

Please refer to Problem with libnv_extimgdev.so library. We would suggest you to upgrade to the latest version (say DRIVE OS 5.2.0) and develop your drivers/applications based on SIPL.

4

Hi VickNV,

again, would you please provide us an example script with a GMSL2 configuration and respective CSI-2 output?
If not, we would need the schematics and more details about the video application to get this run.

Thanks a lot,
Mirko

5

Hello VickNV,

We don’t want to develop drivers or applications. We just want to use the existing nVIDIA App nvmimg_cc to demonstrate capturing of a sensor like data stream. Can nVIDIA provide a configuration file that uses MAX9295A as a serializer and runs in GMSL2 mode?

Thanks
Pirmin

6

I’m checking with our team for GMSL2 script and will update you here. Thanks.

7

highly appreciated, thank you very much!

8

Below is a script snippet for MAX9295A for your reference (not sure if it’s GMSL2). If you have any register questions, please contact MAXIM. Thanks.

80 0330 00
80 0332 EE
80 0333 E4
80 0331 33
80 0311 30
80 0308 63
80 0314 6C
80 0316 52
80 0002 33
80 0006 BF
80 0010 21
9

Thank you VickNV,

Yes, looks like a GMSL2 config for MAX9295A. But what we need most urgently is the GMSL2 configuration of the deserializer inside the AGX (MAX96712). Does the config file that you have this snippet from also have the register writes for the deserializer side?

Thanks
Pirmin

10

Please see if the follow snippet helps. Thanks.

52 0013 75

52 0006 F1

52 0010 22

52 0011 22

80 0330 00
80 0332 EE
80 0333 E4
80 0331 33
80 0311 30
80 0308 63
80 0314 6C
80 0316 52
80 0002 33
80 0006 BF
80 0010 21
52 0018 0F
52 08A0 01
52 08A2 F0
52 00F4 FF
52 090A 40
52 094A 40
52 098A 40
52 09CA 40
52 08A3 44
52 08A4 44
52 0415 39
52 0418 39
52 041B 39
52 041E 39
52 00F0 40
52 00F1 C8
52 00F2 51
52 00F3 D9

52 090B 07
52 092D 00
52 090D 2C
52 090E 2C
52 090F 00
52 0910 02
52 0911 01
52 0912 03

52 094B 07
52 096D 00
52 094D 2C
52 094E 6C
52 094F 00
52 0950 42
52 0951 01
52 0952 43

52 098B 07
52 09AD 00
52 098D 2C
52 098E AC
52 098F 00
52 0990 82
52 0991 01
52 0992 83

52 09CB 07
52 09ED 00
52 09CD 2C
52 09CE EC
52 09CF 00
52 09D0 C2
52 09D1 01
52 09D2 C3

52 0A0B 07
52 0A2D 00
52 0A0D 12
52 0A0E 12
52 0A0F 00
52 0A10 00
52 0A11 01
52 0A12 01

52 0A4B 07
52 0A6D 00
52 0A4D 12
52 0A4E 52
52 0A4F 00
52 0A50 40
52 0A51 01
52 0A52 41

52 0A8B 07
52 0AAD 00
52 0A8D 12
52 0A8E 92
52 0A8F 00
52 0A90 80
52 0A91 01
52 0A92 81

52 0ACB 07
52 0AED 00
52 0ACD 12
52 0ACE D2
52 0ACF 00
52 0AD0 C0
52 0AD1 01
52 0AD2 C1
52 0018 0F
11

Hello VickNV,

Thanks for the new snippet.
However, it does not help. nvmimg_cc still times out :-(

Any more ideas how to proceed ?

Thanks
Pirmin

12

If it’s register programming issues, please contact MAXIM. Thanks.

13

Hello VickNV,

We don’t have register programming issues. They program fine. But they need to be set right to make the GMSL2 input of the AGX work. Register content is depending on the structure of the AGX input HW which we have no information about.
Can we get more info about the HW structure of the GMSL input? How does the connection between Deserializer and nVIDIA SoC look like? Does the nvmimg_cc app expec to get synchronisation from the GMLS? Does nvmimg_cc app accept only specific CSI streams?
NDA is in place as far as I know. So can you please check and give us more information.

Thanks

14

For the documentation not released in the developer site, you need to contact with your nvidia representative to discuss it. Sorry for any inconvenience .