While looking at the Jetson Orin NX datasheet, I wasn’t able to be sure about the thresholds for logical low and high levels for GPIOs and I2C.
They are given quite explicitly in section “4.2 digital logic” (p38), but they are all function of VDD. However, nowhere in the document is the precise meaning of VDD explained. There are explantions about VDD_IN (5 to 20V), but that doesn’t makes sens for 1.8V logic.
So I suppose that VDD is supposed to be 1.8V for GPIOs : correct?
But what about the I2C pins that use pull-up to 3.3V (ie I2C 0, 1 and camera) : is VDD still 1.8V or 3.3V? Nb : it matters quite a lot for me, because I would like to use some isolators (similar to optocouplers but with magnetic or capacitive coupling) on those I2Cs, and they often have quite high voltages for the “low” side (so if the highest accepted value for a logical low is 0.253.3V I’m fine, if it 0.251.8V, then it won’t work).
If you know of any working and compact design to interface between I2C 0/1/camera and a 5V I2C bus, with >500V spike isolation, I’m also interested.
Thanks a lot in advance