Orin power on error

我们在测试系统上电的稳定性,每隔3分钟对Orin进行一次断电重启,测试几百次后,偶现Orin boot无法启动问题,串口日志如下:
enable sdmmc_legacy_tm
initialized clk_mach_post
initialized pg_post
initialized regulator_post
initialized ▒▒[ 2.720174] Camera-FW on t234-rce-safe ready SHA1=97e50cbf (crt 21.043 ms,▒▒profile
initialized fuse_late
initialized mrq
initialized patrol_scrubber
▒▒ total boot 174.002 ms)
▒▒initialized cactmon
initialized extras_post
bpmp: init complete
▒▒I> Binary tos loaded successfully at 0x103fdfe000
I> Relocating OP-TEE dtb from: 0x103feff770 to 0x102ee30000, size: 0x1976
I> [0] START: 0x80000000, SIZE: 0xfaee70000
I> [1] START: 0x1036000000, SIZE: 0x2000000
I> Setting NS memory ranges to OP-TEE dtb finished.
I> Partition name: A_eks
I> Size of partition: 262144
I> Binary@ device:3/0 block-44288 (partition size: 0x40000), name: A_eks
I> eks: Authentication Finalize Done
I> Binary eks loaded successfully at 0x1030000400
I> EKB detected (length: 0x410) @ VA:0x1030000400
I> Task: Prepare TOS params (0x50018580)
I> Setting EKB blob info to OPTEE dtb finished.
I> Setting OPTEE arg3: 0x102ee30000
I> Task: OEM SC7 context save (0x500197dc)
I> OEM sc7 context saved
I> Task: Disable MSS perf stats (0x50026b08)
I> Task: Program display sticky bits (0x50026a84)
I> Task: Storage device deinit (0x50001eec)
I> Task: SMMU external bypass disable (0x50016a60)
I> Task: SMMU init (0x5001697c)
I> Task: Program GICv3 registers (0x50026ba8)
I> Task: Audit firewall settings (0x50023bd0)
I> Task: Bootchain failure check (0x50002434)
I> Current Boot-Chain Slot: 0
I> BR-BCT Boot-Chain is 0, and status is 1. Set UPDATE_BRBCT bit to 0
I> MB2 finished

▒▒NOTICE: BL31: v2.6(release):07eea4970
NOTICE: BL31: Built : 07:55:15, Mar 19 2023
ERROR: **************************************
ERROR: RAS Uncorrectable Error in SCC, base=0xe013000:
ERROR: Status = 0xec00090d
ERROR: SERR = Illegal address (software fault): 0xd
ERROR: IERR = Address Range Error: 0x9
ERROR: Overflow (there may be more errors) - Uncorrectable
ERROR: MISC0 = 0xa000000
ERROR: MISC1 = 0x39831
ERROR: MISC2 = 0x0
ERROR: MISC3 = 0x0
ERROR: ADDR = 0x80000044bcc73000
ERROR: **************************************
ERROR: sdei_dispatch_event returned -1
/TC:
▒▒DCE: FW Boot Done
▒▒I/TC: Non-secure external DT found
I/TC: OP-TEE version: 3.19 (gcc version 9.3.0 (Buildroot 2020.08)) #2 Sun Mar 19 15:02:44 UTC 2023 aarch64
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check Porting guidelines — OP-TEE documentation documentation
I/TC: Primary CPU initializing
I/TC: WARNING: Test OEM keys are being used!
I/TC: This is only for TZ-SE testing and should NOT be used for a shipping product!
I/TC: Primary CPU switching to normal world boot
▒▒
Jetson UEFI firmware (version 3.1-32827747 built on 2023-03-19T14:56:32+00:00)

** WARNING: Test Key is used. **

L4TLauncher: Attempting Direct Boot
EFI stub: Booting Linux Kernel…
EFI stub: Using DTB from configuration table
EFI stub: Loaded initrd from LINUX_EFI_INITRD_MEDIA_GUID device path
EFI stub: Exiting boot services and installing virtual address map…
▒▒ERROR: **************************************
ERROR: RAS Uncorrectable Error in SCC, base=0xe012000:
ERROR: Status = 0xec00090d
ERROR: SERR = Illegal address (software fault): 0xd
ERROR: IERR = Address Range Error: 0x9
ERROR: Overflow (there may be more errors) - Uncorrectable
ERROR: MISC0 = 0x16000000
ERROR: MISC1 = 0x831
ERROR: MISC2 = 0x0
ERROR: MISC3 = 0x0
ERROR: ADDR = 0x80000044bcc73240
ERROR: **************************************
ERROR: sdei_dispatch_event returned -1
ERROR: **************************************
ERROR: RAS Uncorrectable Error in SCC, base=0xe013000:
ERROR: Status = 0xec00090d
ERROR: SERR = Illegal address (software fault): 0xd
ERROR: IERR = Address Range Error: 0x9
ERROR: Overflow (there may be more errors) - Uncorrectable
ERROR: MISC0 = 0x12000000
ERROR: MISC1 = 0x45831
ERROR: MISC2 = 0x0
ERROR: MISC3 = 0x0
ERROR: ADDR = 0x80000044bcc73000
ERROR: **************************************
ERROR: sdei_dispatch_event returned -1
/TC: Secondary CPU 1 initializing
I/TC: Secondary CPU 1 switching to normal world boot
I/TC: Secondary CPU 2 initializing
I/TC: Secondary CPU 2 switching to normal world boot
I/TC: Secondary CPU 3 initializing
I/TC: Secondary CPU 3 switching to normal world boot
I/TC: Secondary CPU 4 initializing
I/TC: Secondary CPU 4 switching to normal world boot
I/TC: Secondary CPU 5 initializing
I/TC: Secondary CPU 5 switching to normal world boot
I/TC: Secondary CPU 6 initializing
I/TC: Secondary CPU 6 switching to normal world boot
I/TC: Secondary CPU 7 initializing
I/TC: Secondary CPU 7 switching to normal world boot
I/TC: Secondary CPU 8 initializing
I/TC: Secondary CPU 8 switching to normal world boot
I/TC: Secondary CPU 9 initializing
I/TC: Secondary CPU 9 switching to normal world boot
I/TC: Secondary CPU 10 initializing
I/TC: Secondary CPU 10 switching to normal world boot
I/TC: Secondary CPU 11 initializing
I/TC: Secondary CPU 11 switching to normal world boot

Which JetPack SW you’re using?
Testing is on your custom carrier board, right?

1 Like

Looks like you are still in rel-35.3.1. Please move to rel-35.4.1.

This one should be fixed there.

yes ,our custom carrier board

yes,the version in rel-35.3.1,is there release note about the bug in the rel-35.4.1.

sorry, no. This issue seems missing from release note.

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