Questions about circuit in HDMI part of development kit

Hello,

I’m looking at the HDMI part of the Jetson Nano Development Kit schematics, and I don’t fully understand this circuit:

I can see that whenever HDMI_CEC is low, HDMI_CEC_Q will be low due to the MOSFET. That’s fine. Now when HDMI_CEC is high, the 2 diodes will conduct either HDMI_CEC or VDD_3V3_HDMI to HDMI_CEC_Q. So, my questions are:

  1. Won’t those diodes drop some forward voltage? I see on its datasheet that for this situation they will drop ~0.3-0.6V. Is that drop acceptable for HDMI?

  2. Is HDMI_CEC really bidirectional? Because I can see the same 0.3-0.6V drop when it’s conducting from HDMI_CEC_Q to HDMI_CEC and HDMI_CEC_Q is low.

  3. Why not simply connect HDMI_CEC to HDMI_CEC_Q?

  4. How is the inductor L502 serving in this situation?

Thanks very much for your help!

Hi, please refer to below comments:

FET is there to prevent any external 3.3V from reaching Tegra when Tegra is off.
Should use FET with low parasitic capacitance (max capacitance allowed is 150 pF)
During fully powered-off state, max leakage current allowed by HDMI spec is 1.8uA.
So pull up must be disconnected from CEC when device is off
Isolating diode between CEC and pull up – reverse-biased in the off state when external device pulling up the CEC line.
BAS70W diode reverse current is max 100nA (0.1uA)
Since spec requires 27k +/- 5% pull up, 162k and 32.4k in parallel create the necessary 27k pullup.
Additional diode: in the ON case, if diode Vf is closer to max (for our FET can be 1.4V), then the effective resistance changes quite a bit, you wouldn’t see 27k anymore
-provide lower resistance path

D19 is for ESD protection for the FET

The line should not be pulled down by the powered off device

Thanks Trumany for your great explanation. So much of those things are due to HDMI specs.

About the MOSFET, I was using on my circuit the DMN63D8L-7, which has an input capacitance of 23.2pF but gate-source leakage of +/-10µA. You mentioning that the maximum leakage should be 1.8µA saved me! Thanks again!

So I changed to the DMN67D8L, which has input capacitance of 22pF and leakage current of +/-100nA, as shown below:

I compared it with the MOSFET used by NVIDIA on the Development Kit and I believe this one is ok. But do you see anything else on this MOSFET that could cause issues to the HDMI interface?

It looks fine.

We have no HDMI spec for sharing, maybe you can search it online.

What about something like this:

Closer view:

image

It seems to do all the job in 1 single chip.

Datasheet: https://www.ti.com/lit/ds/symlink/tpd12s016.pdf?ts=1626379672829&ref_url=https%3A%2F%2Fwww.google.com%2F

No suggestion on this. The key point for Jetson is the design should follow the HDMI part guide in OEM DG on Jetson side.

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