I have two Xavier NX boards interconnected by PCIe, one is Root Complex (RC), other is End Point (EP).
I want to have CPU access to RC dedicated local memory from EP card, and vice versa, have CPU access to EP dedicated local memory from RC card.
As I see, the EP driver (pcie-tegra-dw-ep.c) is opening only inbound iATU regions, and RC driver (pcie-tegra-dw.c) is opening only outbound iATU regions.
My question is if it’s possible to access RC memory from the EP without opening outbound iATU region on the EP and inbound iATU region on the CR side?
There is no need to configure any inbound iATU region on the RC side as the default configuration is that any upstream memory transaction would target the RC’s host/local memory by default.
As far as the outbound iATU region on the EP side is concerned, it is required if the access is coming from the EP’s local CPU and not required if the transaction initiator is EP’s DMA engine.
@vidyas , thank you for reply!
I understand that we have to modify EP driver to enable access to RC?
I wondering, how the translation is made on RC side from inbound 64bit PCI address to local memory address if inbound translation region is not involved? Which registers are make it?