Replace PHY on JETSON AGX XAVIER switch microchip KSZ9896

Autonomous Machines Jetson & Embedded Systems Jetson AGX Xavier
1

Hi! I’m trying to use KSZ9896 as PHY on Jetson AGX Xavier custom board. KSZ9896 connected over RGMII interface on port 6 and I2C bus.I have modified dtsi and ported KSZ9896 driver,but it didn’t work.
Please help to make ksz9896 work properly on AGX.
The attachments is the kernel log.
my dtsi as bellow:
#include <dt-bindings/gpio/tegra194-gpio.h>

/ {
ether_qos0: ether_qos@2490000 {
/* PTP_ref clock speed in MHz /
nvidia,ptp_ref_clock_speed = <312500000>;
/ rxq_enable_ctrl =
* 0x0 = Not enabled, 0x1 = Enabled for AV
* 0x2 = Enabled for Legacy, 0x3 = Reserved
*/
nvidia,rxq_enable_ctrl = <2 2 2 2>;
nvidia,queue_prio = <0 1 2 3>;

            nvidia,use_tagged_ptp;
            nvidia,ptp_dma_ch = <3>;

            nvidia,chan_napi_quota = <64 64 64 64>;
            nvidia,pause_frames = <0>; /*0=enable, 1=disable */
            nvidia,phy-reset-gpio = <&tegra_main_gpio TEGRA194_MAIN_GPIO(G, 5) 0>;
            nvidia,phy-max-frame-size = <16>;       /* size in kbytes */
            nvidia,eth_iso_enable = <1>; /*0=enable, 1=disable */
            phy-mode = "rgmii-id";
            phy-handle = <&switch0port5>;
            mdytest = "madayi210914";

    };
             i2c@3160000 {

                       phy0: ksz9896@5f {
                                    compatible = "microchip,ksz9896";
                                    reg = <0x5f>;
                                    phy-mode = "rgmii-id";

                                    interrupt-parent = <&tegra_main_gpio>;
                                    interrupts = <TEGRA194_MAIN_GPIO(G, 4) IRQ_TYPE_LEVEL_LOW>;
                                    status = "okay";
                                    ports {
                                            #address-cells = <1>;
                                            #size-cells = <0>;
                                            port@0 {
                                                    reg = <0>;
                                                    label = "lan1";
                                            };
                                            port@1 {
                                                    reg = <1>;
                                                    label = "lan2";
                                            };
                                            port@2 {
                                                    reg = <2>;
                                                    label = "lan3";
                                            };
                                            port@3 {
                                                    reg = <3>;
                                                    label = "lan4";
                                            };
                                            port@4 {
                                                    reg = <4>;
                                                    label = "lan5";
                                            };
                              switch0port5: port@5 {
                                                    reg = <5>;
                                                    label = "cpu";
                                                    ethernet = <&ether_qos0>;
                                                    phy-mode = "rgmii-id";
                                                    fixed-link {
                                                                speed = <1000>;
                                                                full-duplex;
                                                    };
                                             };

                                    };
                            };
                     };

    thermal-zones {
            CPU-therm {
                    trips {
                            MAKE_EQOS_TRIP(m40, -40000, 5000);
                            MAKE_EQOS_TRIP(m5, -5000, 5000);
                            MAKE_EQOS_TRIP(p30, 30000, 5000);
                            MAKE_EQOS_TRIP(p65, 65000, 5000);
                            MAKE_EQOS_TRIP(p100, 100000, 5000);
                    };

                    cooling-maps {
                            MAP_EQOS(m40, 1);
                            MAP_EQOS(m5, 2);
                            MAP_EQOS(p30, 3);
                            MAP_EQOS(p65, 4);
                            MAP_EQOS(p100, 5);
                    };
            };
    };

};

dmesg20200915.log (79.0 KB)

2

This is a duplicate submission.

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3

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