I’m actually working on a project involving the SPE and the CCPLEX units of the Jetson TX2. I’ve referred to the “Jetson Sensor Processing Engine (SPE) Developer Guide” to build, run and flash the FreeRTOS based project without any problem. I’ve also successfully tested the IVC communication and everything seems to work as expected. But I’ve some questions about the process for learning purposes. My questions are:
- What does IVC stands for? (I couldn’t find this information in any of the Nvidia documents/guides).
- To properly run the GPIO example (Jetson Sensor Processing Engine (SPE) Developer Guide: GPIO Application (app/gpio-app.c)) we should prevent the Kernel from using the GPIO. Are the CCPLEX and SPE using the same GPIO peripheral? I thought that the SPE is an independent microcontroller with its own GPIO and other peripherals.
- What is the “GPIO SCR” ? What are we actually changing by modifying a scr.X value in a .cfg file
- Why do we have the modify the PADCTL register of the pinmux? What is the pinmux used for in the Jetson TX2 SoC?
- I know that we can use some printf’s to debug the SPE binary, but is it possible to use an IDE to debug the code line by line using the spe.elf file? If yes which IDE would you suggest?
Any detailed answer will be highly appreciated. I couldn’t find/see suitable answers for these questions in the online available materials.