SOF T/O errors from FPGA generated dual VC stream in JP4.2.1 on TX2

Hello - I’m having a problem getting an FPGA generated multiplexed dual VC stream to capture correctly. The errors I’m seeing on both VC streams are SOF timeout errors. I based the driver on the imx185 contained in the Jetpack 4.2.1 release (even though the DTs show imx290) - removing I2C support and adding dual VC support in the device trees (shown below). Both VCs show up as V4L2 devices (/dev/video0 and /dev/video1), but both VC0 and VC1 streams get errors while using the yavta tool (see below). I know the stream is coming into the correct MIPI lanes because I see different errors (only SOF timeout errors) when I turn off the FPGA board. The VI is reacting to the incoming stream when the other error outputs are shown. I also added a trace output when the yavta tool was run in case this gives any more useful information.

Also - the device trees indicate a 1920x1080 resolution (which is what the FPGA is generating), but the yavta tool shows 1948x1096 for some reason - which could indicate a different configuration is being used. Traces from sensor_common_parse_signal_props() in sensor_common.c show that the device trees are being read in correctly and sensor_signal_properties are being set correctly. My thought here is that if VI is not using the resolution from the DT’s, then other important info set in the DT may have also not been used - i.e. line_length, pix_clk_hz - which would definitely cause the SOF timeout errors.

Both VCs of the stream coming from the FPGA have been verified on JetPack 3.3 using the VC as is from tegra_channel_capture_setup() (the default VC=1), then changing to VC=2, recompiling to see the other VC of the multiplexed stream. Yavta ran normally w/o error in this setup showing a framerate of exactly half for each VC of the incoming stream, and the onscreen video was correct, so I feel the generated stream is correct. We are now using JP4.2.1 because of the native virtual channel support.

Questions:

  1. Can you see anything obvious from the device trees, traces or error outputs below?
  2. Why would the Yavta tool show a different resolution than what’s in the device trees?
    a) … and does that have any relation to the errors I’m seeing from Question 1?
  3. Does the invalid formats errors in the V4L2 compliance output have anything to do with this?
  4. Is there a document from Nvidia showing VI/NVCSI error registers formats (i.e. ERROR_STATUS2VI_VC0, ERR_INTR_STATUS)?

MISC INFO:

  • JetPack 4.2.1 running on a TX2
    • Linux TX2-32 4.9.140+ #26 SMP PREEMPT Wed Jul 31 13:46:18 CDT 2019 aarch64 aarch64 aarch64 GNU/Linux
  • Kernel source obtained thru sync_source (./source_sync.sh -t tegra-l4t-r32.2.0)
  • FPGA generated dual VC stream (VCs = 0 & 1) coming in on MIPI lanes 0-1

DEVICE TREE:
/*

  • Copyright © 2016, NVIDIA CORPORATION. All rights reserved.
  • This program is free software; you can redistribute it and/or modify
  • it under the terms of the GNU General Public License as published by
  • the Free Software Foundation; either version 2 of the License, or
  • (at your option) any later version.
  • This program is distributed in the hope that it will be useful, but WITHOUT
  • ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  • FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  • more details.
  • You should have received a copy of the GNU General Public License
  • along with this program. If not, see http://www.gnu.org/licenses/.
    */

/ {
host1x {
vi@15700000 {
num-channels = <2>;
status = “okay”;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
liimx290_vi_in0: endpoint {
vc-id = <0>;
port-index = <0>;
bus-width = <2>;
remote-endpoint = <&liimx290_csi_out0>;
status = “okay”;
};
};
port@1 {
reg = <1>;
liimx290_vi_in1: endpoint {
vc-id = <1>;
port-index = <0>;
bus-width = <2>;
remote-endpoint = <&liimx290_csi_out1>;
status = “okay”;
};
};
};
};

	nvcsi@150c0000 {
		num-channels = <2>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "okay";
		channel@0 {
			reg = <0>;
			status = "okay";
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					liimx290_csi_in0: endpoint@0 {
						port-index = <0>;
						bus-width = <2>;
						remote-endpoint = <&liimx290_imx290_out0>;
						status = "okay";
					};
				};
				port@1 {
					reg = <1>;
					liimx290_csi_out0: endpoint@1 {
						remote-endpoint = <&liimx290_vi_in0>;
						status = "okay";
					};
				};
			};
		};
		channel@1 {
			reg = <1>;
			status = "okay";
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					liimx290_csi_in1: endpoint@2 {
						port-index = <0>;
						bus-width = <2>;
						remote-endpoint = <&liimx290_imx290_out1>;
						status = "okay";
					};
				};
				port@1 {
					reg = <1>;
					liimx290_csi_out1: endpoint@3 {
						remote-endpoint = <&liimx290_vi_in1>;
						status = "okay";
					};
				};
			};
		};
	};
};

i2c@3180000 {

// i2c@0 {
imx290_a@1a {
compatible = “nvidia,imx290”;
/* I2C device address */
reg = <0x1a>;

		/* V4L2 device node location */
		// devnode = "video1";

		/* Physical dimensions of sensor */
		physical_w = "1.948";
		physical_h = "1.109";


		/* Define any required hw resources needed by driver */
		/* ie. clocks, io pins, power sources */
		/*avdd-reg = "vana";*/
		iovdd-reg = "vif";
		/*dvdd-reg = "vdig";*/
		sensor_model ="imx290";

		/* Defines number of frames to be dropped by driver internally after applying */
		/* sensor crop settings. Some sensors send corrupt frames after applying */
		/* crop co-ordinates */
		post_crop_frame_drop = "0";

		/* if true, delay gain setting by one frame to be in sync with exposure */
		delayed_gain = "true";

		/* enable CID_SENSOR_MODE_ID for sensor modes selection */
		use_sensor_mode_id = "true";
		
		/**
		* A modeX node is required to support v4l2 driver
		* implementation with NVIDIA camera software stack
		*
		* mclk_khz = "";
		* Standard MIPI driving clock, typically 24MHz
		*
		* num_lanes = "";
		* Number of lane channels sensor is programmed to output
		*
		* tegra_sinterface = "";
		* The base tegra serial interface lanes are connected to
		*
		* discontinuous_clk = "";
		* The sensor is programmed to use a discontinuous clock on MIPI lanes
		*
		* dpcm_enable = "true";
		* The sensor is programmed to use a DPCM modes
		*
		* cil_settletime = "";
		* MIPI lane settle time value.
		* A "0" value attempts to autocalibrate based on mclk_multiplier
		*
		*
		*
		*
		* active_w = "";
		* Pixel active region width
		*
		* active_h = "";
		* Pixel active region height
		*
		* pixel_t = "";
		* The sensor readout pixel pattern
		*
		* readout_orientation = "0";
		* Based on camera module orientation.
		* Only change readout_orientation if you specifically
		* Program a different readout order for this mode
		*
		* line_length = "";
		* Pixel line length (width) for sensor mode.
		* This is used to calibrate features in our camera stack.
		*
		* mclk_multiplier = "";
		* Multiplier to MCLK to help time hardware capture sequence
		* TODO: Assign to PLL_Multiplier as well until fixed in core
		*
		* pix_clk_hz = "";
		* Sensor pixel clock used for calculations like exposure and framerate
		*
		*
		*
		*
		* inherent_gain = "";
		* Gain obtained inherently from mode (ie. pixel binning)
		*
		* min_gain_val = ""; (floor to 6 decimal places)
		* max_gain_val = ""; (floor to 6 decimal places)
		* Gain limits for mode
		*
		* min_exp_time = ""; (ceil to integer)
		* max_exp_time = ""; (ceil to integer)
		* Exposure Time limits for mode (us)
		*
		*
		* min_hdr_ratio = "";
		* max_hdr_ratio = "";
		* HDR Ratio limits for mode
		*
		* min_framerate = "";
		* max_framerate = "";
		* Framerate limits for mode (fps)
		*
		* embedded_metadata_height = "";
		* Sensor embedded metadata height in units of rows.
		* If sensor does not support embedded metadata value should be 0.
		*/
		mode0 {/*mode IMX290_MODE_1920X1080_CROP_60FPS*/
			mclk_khz = "24000";
			num_lanes = "2";
			tegra_sinterface = "serial_a";
			vc_id = "0";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			dpcm_enable = "false";
			cil_settletime = "0";

			dynamic_pixel_bit_depth = "16";
			csi_pixel_bit_depth = "16";
			mode_type = "yuv";
			pixel_phase = "yuyv";
			pixel_t = "yuv_yuyv";

			active_w = "1920";
			active_h = "1080";
			readout_orientation = "0";
			line_length = "3840";
			inherent_gain = "1";
			mclk_multiplier = "24";
			pix_clk_hz =  "74250000";

			gain_factor = "10";
			min_gain_val = "0"; /* 0dB */
			max_gain_val = "480"; /* 48dB */
			step_gain_val = "3"; /* 0.3 */
			default_gain = "0";
			min_hdr_ratio = "1";
			max_hdr_ratio = "1";
			framerate_factor = "1000000";
			min_framerate = "1500000"; /* 1.5 */
			max_framerate = "30000000"; /* 30 */
			step_framerate = "1";
			default_framerate = "30000000";
			exposure_factor = "1000000";
			min_exp_time = "30"; /* us */
			max_exp_time = "660000"; /* us */
			step_exp_time = "1";
			default_exp_time = "33334";/* us */
			embedded_metadata_height = "0";
		};

		ports {
			#address-cells = <1>;
			#size-cells = <0>;
			port@0 {
				reg = <0>;
				liimx290_imx290_out0: endpoint {
					vc-id = <0>;
					port-index = <0>;
					bus-width = <2>;
					remote-endpoint = <&liimx290_csi_in0>;
					status = "okay";
					};
				};
			};
		};
		imx290_b@1c {
		compatible = "nvidia,imx290";
		/* I2C device address */
		reg = <0x1c>;

		/* V4L2 device node location */
		// devnode = "video1";

		/* Physical dimensions of sensor */
		physical_w = "1.948";
		physical_h = "1.109";


		/* Define any required hw resources needed by driver */
		/* ie. clocks, io pins, power sources */
		/*avdd-reg = "vana";*/
		iovdd-reg = "vif";
		/*dvdd-reg = "vdig";*/
		sensor_model ="imx290";

		/* Defines number of frames to be dropped by driver internally after applying */
		/* sensor crop settings. Some sensors send corrupt frames after applying */
		/* crop co-ordinates */
		post_crop_frame_drop = "0";

		/* if true, delay gain setting by one frame to be in sync with exposure */
		delayed_gain = "true";

		/* enable CID_SENSOR_MODE_ID for sensor modes selection */
		use_sensor_mode_id = "true";
		
		/**
		* A modeX node is required to support v4l2 driver
		* implementation with NVIDIA camera software stack
		*
		* mclk_khz = "";
		* Standard MIPI driving clock, typically 24MHz
		*
		* num_lanes = "";
		* Number of lane channels sensor is programmed to output
		*
		* tegra_sinterface = "";
		* The base tegra serial interface lanes are connected to
		*
		* discontinuous_clk = "";
		* The sensor is programmed to use a discontinuous clock on MIPI lanes
		*
		* dpcm_enable = "true";
		* The sensor is programmed to use a DPCM modes
		*
		* cil_settletime = "";
		* MIPI lane settle time value.
		* A "0" value attempts to autocalibrate based on mclk_multiplier
		*
		*
		*
		*
		* active_w = "";
		* Pixel active region width
		*
		* active_h = "";
		* Pixel active region height
		*
		* pixel_t = "";
		* The sensor readout pixel pattern
		*
		* readout_orientation = "0";
		* Based on camera module orientation.
		* Only change readout_orientation if you specifically
		* Program a different readout order for this mode
		*
		* line_length = "";
		* Pixel line length (width) for sensor mode.
		* This is used to calibrate features in our camera stack.
		*
		* mclk_multiplier = "";
		* Multiplier to MCLK to help time hardware capture sequence
		* TODO: Assign to PLL_Multiplier as well until fixed in core
		*
		* pix_clk_hz = "";
		* Sensor pixel clock used for calculations like exposure and framerate
		*
		*
		*
		*
		* inherent_gain = "";
		* Gain obtained inherently from mode (ie. pixel binning)
		*
		* min_gain_val = ""; (floor to 6 decimal places)
		* max_gain_val = ""; (floor to 6 decimal places)
		* Gain limits for mode
		*
		* min_exp_time = ""; (ceil to integer)
		* max_exp_time = ""; (ceil to integer)
		* Exposure Time limits for mode (us)
		*
		*
		* min_hdr_ratio = "";
		* max_hdr_ratio = "";
		* HDR Ratio limits for mode
		*
		* min_framerate = "";
		* max_framerate = "";
		* Framerate limits for mode (fps)
		*
		* embedded_metadata_height = "";
		* Sensor embedded metadata height in units of rows.
		* If sensor does not support embedded metadata value should be 0.
		*/
		mode0 {/*mode IMX290_MODE_1920X1080_CROP_60FPS*/
			mclk_khz = "24000";
			num_lanes = "2";
			tegra_sinterface = "serial_a";
			vc_id = "1";
			phy_mode = "DPHY";
			discontinuous_clk = "no";
			dpcm_enable = "false";
			cil_settletime = "0";

			dynamic_pixel_bit_depth = "16";
			csi_pixel_bit_depth = "16";
			mode_type = "yuv";
			pixel_phase = "yuyv";
			pixel_t = "yuv_yuyv";

			active_w = "1920";
			active_h = "1080";
			readout_orientation = "0";
			line_length = "3840";
			inherent_gain = "1";
			mclk_multiplier = "24";
			pix_clk_hz =  "74250000";

			gain_factor = "10";
			min_gain_val = "0"; /* 0dB */
			max_gain_val = "480"; /* 48dB */
			step_gain_val = "3"; /* 0.3 */
			default_gain = "0";
			min_hdr_ratio = "1";
			max_hdr_ratio = "1";
			framerate_factor = "1000000";
			min_framerate = "1500000"; /* 1.5 */
			max_framerate = "30000000"; /* 30 */
			step_framerate = "1";
			default_framerate = "30000000";
			exposure_factor = "1000000";
			min_exp_time = "30"; /* us */
			max_exp_time = "660000"; /* us */
			step_exp_time = "1";
			default_exp_time = "33334";/* us */
			embedded_metadata_height = "0";
		};

		ports {
			#address-cells = <1>;
			#size-cells = <0>;
			port@0 {
				reg = <0>;
				liimx290_imx290_out1: endpoint {
					vc-id = <1>;
					port-index = <0>;
					bus-width = <2>;
					remote-endpoint = <&liimx290_csi_in1>;
					status = "okay";
					};
				};
			};
		};

// };
};
};

/ {

tegra-camera-platform {
	compatible = "nvidia, tegra-camera-platform";
	/**
	* Physical settings to calculate max ISO BW
	*
	* num_csi_lanes = <>;
	* Total number of CSI lanes when all cameras are active
	*
	* max_lane_speed = <>;
	* Max lane speed in Kbit/s
	*
	* min_bits_per_pixel = <>;
	* Min bits per pixel
	*
	* vi_peak_byte_per_pixel = <>;
	* Max byte per pixel for the VI ISO case
	*
	* vi_bw_margin_pct = <>;
	* Vi bandwidth margin in percentage
	*
	* max_pixel_rate = <>;
	* Max pixel rate in Kpixel/s for the ISP ISO case
	*
	* isp_peak_byte_per_pixel = <>;
	* Max byte per pixel for the ISP ISO case
	*
	* isp_bw_margin_pct = <>;
	* Isp bandwidth margin in percentage
	*/
	num_csi_lanes = <2>;
	// v GregL - look at this! v
	max_lane_speed = <1500000>;
	min_bits_per_pixel = <10>;
	vi_peak_byte_per_pixel = <2>;
	vi_bw_margin_pct = <25>;
	isp_peak_byte_per_pixel = <5>;
	isp_bw_margin_pct = <25>;

	/**
	 * The general guideline for naming badge_info contains 3 parts, and is as follows,
	 * The first part is the camera_board_id for the module; if the module is in a FFD
	 * platform, then use the platform name for this part.
	 * The second part contains the position of the module, ex. "rear" or "front".
	 * The third part contains the last 6 characters of a part number which is found
	 * in the module's specsheet from the vender.
	 */
	modules {
		module1 {
			badge = "imx290_topright_liimx290";
			position = "topright";
			orientation = "1";
			status = "okay";
			drivernode0 {
				/* Declare PCL support driver (classically known as guid)  */
				pcl_id = "v4l2_sensor";
				/* Driver v4l2 device name */
				devname = "imx290 2-001c";
				/* Declare the device-tree hierarchy to driver instance */
				proc-device-tree = "/proc/device-tree/i2c@3180000/imx290_b@1c";
				status = "okay";
			};
		};
		module0 {
			badge = "imx290_topleft_liimx290";
			position = "topleft";
			orientation = "1";
			status = "okay";
			drivernode0 {
				/* Declare PCL support driver (classically known as guid)  */
				pcl_id = "v4l2_sensor";
				/* Driver v4l2 device name */
				devname = "imx290 2-001a";
				/* Declare the device-tree hierarchy to driver instance */
				proc-device-tree = "/proc/device-tree/i2c@3180000/imx290_a@1a";
				status = "okay";
			};
		};
	};
};

};


V4L2 COMPLIANCE:
nvidia@TX2-32:~$ v4l2-compliance -d /dev/video0
v4l2-compliance SHA : not available

Driver Info:
Driver name : tegra-video
Card type : vi-output, imx290 2-001a
Bus info : platform:15700000.vi:0
Driver version: 4.9.140
Capabilities : 0x84200001
Video Capture
Streaming
Extended Pix Format
Device Capabilities
Device Caps : 0x04200001
Video Capture
Streaming
Extended Pix Format

Compliance test for device /dev/video0 (not using libv4l2):

Required ioctls:
test VIDIOC_QUERYCAP: OK

Allow for multiple opens:
test second video open: OK
test VIDIOC_QUERYCAP: OK
test VIDIOC_G/S_PRIORITY: OK
test for unlimited opens: OK

Debug ioctls:
test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
test VIDIOC_LOG_STATUS: OK

Input ioctls:
test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
test VIDIOC_ENUMAUDIO: OK (Not Supported)
test VIDIOC_G/S/ENUMINPUT: OK
test VIDIOC_G/S_AUDIO: OK (Not Supported)
Inputs: 1 Audio Inputs: 0 Tuners: 0

Output ioctls:
test VIDIOC_G/S_MODULATOR: OK (Not Supported)
test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
test VIDIOC_ENUMAUDOUT: OK (Not Supported)
test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
test VIDIOC_G/S_AUDOUT: OK (Not Supported)
Outputs: 0 Audio Outputs: 0 Modulators: 0

Input/Output configuration ioctls:
test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported)
test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported)
test VIDIOC_G/S_EDID: OK (Not Supported)

Test input 0:

    Control ioctls:
            test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
            test VIDIOC_QUERYCTRL: OK
            test VIDIOC_G/S_CTRL: OK
            test VIDIOC_G/S/TRY_EXT_CTRLS: OK
            test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK
            test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
            Standard Controls: 1 Private Controls: 18

    Format ioctls:
            fail: v4l2-test-formats.cpp(273): duplicate format 56595559 (YUYV)
            test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: FAIL
            fail: v4l2-test-formats.cpp(1184): ret && node->has_frmintervals
            test VIDIOC_G/S_PARM: FAIL
            test VIDIOC_G_FBUF: OK (Not Supported)
            test VIDIOC_G_FMT: OK
            test VIDIOC_TRY_FMT: OK
            test VIDIOC_S_FMT: OK
            test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
            test Cropping: OK (Not Supported)
            test Composing: OK (Not Supported)
            fail: v4l2-test-formats.cpp(1630): node->can_scale && node->frmsizes_count[v4l_format_g_pixelformat(&cur)]
            test Scaling: OK

    Codec ioctls:
            test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)
            test VIDIOC_G_ENC_INDEX: OK (Not Supported)
            test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)

    Buffer ioctls:
            test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
            test VIDIOC_EXPBUF: OK

Test input 0:

Total: 43, Succeeded: 41, Failed: 2, Warnings: 0


YAVTA OUTPUT:
nvidia@TX2-32:~$ ./yavta/yavta --no-query -c10 /dev/video0
Device /dev/video0 opened.
Video format: YUYV (56595559) 1948x1096
8 buffers requested.
length: 4270016 offset: 0
Buffer 0 mapped at address 0x7fa103a000.
length: 4270016 offset: 4272128
Buffer 1 mapped at address 0x7fa0c27000.
length: 4270016 offset: 8544256
Buffer 2 mapped at address 0x7fa0814000.
length: 4270016 offset: 12816384
Buffer 3 mapped at address 0x7fa0401000.
length: 4270016 offset: 17088512
Buffer 4 mapped at address 0x7f9ffee000.
length: 4270016 offset: 21360640
Buffer 5 mapped at address 0x7f9fbdb000.
length: 4270016 offset: 25632768
Buffer 6 mapped at address 0x7f9f7c8000.
length: 4270016 offset: 29904896
Buffer 7 mapped at address 0x7f9f3b5000.


ERROR ON CONSOLE:

[ 60.463498] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[ 60.470276] tegra-vi4 15700000.vi: tegra_channel_error_recovery: attempting to reset the capture channel
[ 60.480861] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERROR_STATUS2VI_VC0 = 0x0000000c
[ 60.489744] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERROR_STATUS2VI_VC1 = 0x0000000c
[ 60.498545] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) INTR_STATUS 0x000000cc
[ 60.506467] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERR_INTR_STATUS 0x000000cc
[ 60.975446] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11


TRACE OUTPUT:

tracer: nop

entries-in-buffer/entries-written: 354/354 #P:6

_-----=> irqs-off

/ _----=> need-resched

| / _—=> hardirq/softirq

|| / _–=> preempt-depth

||| / delay

TASK-PID CPU# |||| TIMESTAMP FUNCTION

| | | |||| | |

 kworker/4:1-7114  [004] ....   753.637865: rtos_queue_peek_from_isr_failed: tstamp:23912506100 queue:0x0b4b4500
 kworker/4:1-7114  [004] ....   753.637870: rtcpu_start: tstamp:23912508780
 kworker/4:1-7114  [004] ....   753.637872: rtos_queue_send_from_isr_failed: tstamp:23912522425 queue:0x0b4a7258
 kworker/4:1-7114  [004] ....   753.637873: rtos_queue_send_from_isr_failed: tstamp:23912522529 queue:0x0b4aad68
 kworker/4:1-7114  [004] ....   753.637874: rtos_queue_send_from_isr_failed: tstamp:23912522633 queue:0x0b4ac998
 kworker/4:1-7114  [004] ....   753.637875: rtos_queue_send_from_isr_failed: tstamp:23912522738 queue:0x0b4ae518
 kworker/4:1-7114  [004] ....   753.637875: rtos_queue_send_from_isr_failed: tstamp:23912522840 queue:0x0b4af2d8
 kworker/4:1-7114  [004] ....   753.637876: rtos_queue_send_from_isr_failed: tstamp:23912522944 queue:0x0b4b0098
 kworker/4:1-7114  [004] ....   753.637877: rtos_queue_send_from_isr_failed: tstamp:23912523045 queue:0x0b4b0e58
 kworker/4:1-7114  [004] ....   753.637878: rtos_queue_send_from_isr_failed: tstamp:23912523146 queue:0x0b4b1c18
 kworker/4:1-7114  [004] ....   753.637879: rtos_queue_send_failed: tstamp:23912523612 queue:0x0b4a7258
 kworker/4:1-7114  [004] ....   753.637880: rtos_queue_send_from_isr_failed: tstamp:23912527852 queue:0x0b4a7258
 kworker/4:1-7114  [004] ....   753.637881: rtos_queue_send_from_isr_failed: tstamp:23912527954 queue:0x0b4aad68
 kworker/4:1-7114  [004] ....   753.637882: rtos_queue_send_from_isr_failed: tstamp:23912528066 queue:0x0b4ac998
 kworker/4:1-7114  [004] ....   753.637883: rtos_queue_send_from_isr_failed: tstamp:23912528170 queue:0x0b4ae518
 kworker/4:1-7114  [004] ....   753.637884: rtos_queue_send_from_isr_failed: tstamp:23912528277 queue:0x0b4af2d8
 kworker/4:1-7114  [004] ....   753.637885: rtos_queue_send_from_isr_failed: tstamp:23912528378 queue:0x0b4b0098
 kworker/4:1-7114  [004] ....   753.637885: rtos_queue_send_from_isr_failed: tstamp:23912528482 queue:0x0b4b0e58
 kworker/4:1-7114  [004] ....   753.637886: rtos_queue_send_from_isr_failed: tstamp:23912528583 queue:0x0b4b1c18
 kworker/4:1-7114  [004] ....   753.637887: rtos_queue_send_failed: tstamp:23912529452 queue:0x0b4a7258
 kworker/4:1-7114  [004] ....   753.637889: rtcpu_vinotify_event: tstamp:23913096794 tag:CSIMUX_STREAM channel:0xff frame:0 vi_tstamp:23913096405 data:0x00000001
 kworker/4:1-7114  [004] ....   753.637890: rtcpu_vinotify_event: tstamp:23913805939 tag:CHANSEL_PXL_SOF channel:0x00 frame:3 vi_tstamp:23913804984 data:0x00000001
 kworker/4:1-7114  [004] ....   753.637891: rtcpu_vinotify_event: tstamp:23913806584 tag:ATOMP_FS channel:0x00 frame:3 vi_tstamp:23913804992 data:0x00000000
 kworker/4:1-7114  [004] ....   753.637891: rtcpu_vinotify_event: tstamp:23913807050 tag:CHANSEL_FAULT channel:0x00 frame:3 vi_tstamp:23913805436 data:0x00000200
 kworker/4:1-7114  [004] ....   753.637892: rtcpu_vinotify_event: tstamp:23913808180 tag:CHANSEL_LOAD_FRAMED channel:0x01 frame:3 vi_tstamp:23913807351 data:0x08000000
 kworker/4:1-7114  [004] ....   753.637893: rtcpu_vinotify_event: tstamp:23913808638 tag:CHANSEL_FAULT_FE channel:0x01 frame:3 vi_tstamp:23913807352 data:0x00000001
 kworker/4:1-7114  [004] ....   753.637893: rtcpu_vinotify_event: tstamp:23913809127 tag:ATOMP_FE channel:0x00 frame:3 vi_tstamp:23913807355 data:0x00000000
 kworker/4:1-7114  [004] ....   753.749960: rtos_queue_peek_from_isr_failed: tstamp:23917506673 queue:0x0b4b4500
 kworker/4:1-7114  [004] ....   753.917949: rtos_queue_peek_from_isr_failed: tstamp:23922506687 queue:0x0b4b4500
 kworker/4:1-7114  [004] ....   754.085986: rtos_queue_send_from_isr_failed: tstamp:23927022538 queue:0x0b4a7258
 kworker/4:1-7114  [004] ....   754.085994: rtos_queue_send_from_isr_failed: tstamp:23927023032 queue:0x0b4aad68
 kworker/4:1-7114  [004] ....   754.085997: rtos_queue_send_from_isr_failed: tstamp:23927023493 queue:0x0b4ac998
 kworker/4:1-7114  [004] ....   754.086000: rtos_queue_send_from_isr_failed: tstamp:23927023955 queue:0x0b4ae518
 kworker/4:1-7114  [004] ....   754.086002: rtos_queue_send_from_isr_failed: tstamp:23927024409 queue:0x0b4af2d8
 kworker/4:1-7114  [004] ....   754.086005: rtos_queue_send_from_isr_failed: tstamp:23927024860 queue:0x0b4b0098
 kworker/4:1-7114  [004] ....   754.086007: rtos_queue_send_from_isr_failed: tstamp:23927025315 queue:0x0b4b0e58
 kworker/4:1-7114  [004] ....   754.086009: rtos_queue_send_from_isr_failed: tstamp:23927025778 queue:0x0b4b1c18
 kworker/4:1-7114  [004] ....   754.086013: rtos_queue_send_failed: tstamp:23927028147 queue:0x0b4a7258
 kworker/4:1-7114  [004] ....   754.086015: rtos_queue_send_from_isr_failed: tstamp:23927044568 queue:0x0b4a7258
 kworker/4:1-7114  [004] ....   754.086018: rtos_queue_send_from_isr_failed: tstamp:23927045025 queue:0x0b4aad68
 kworker/4:1-7114  [004] ....   754.086020: rtos_queue_send_from_isr_failed: tstamp:23927045486 queue:0x0b4ac998

Let me know if you need any more information and thanks for your help.

You need to modify the kernel driver to report the correct resolution. The sensor mode in the DT is used by ISP pipeline due to your driver is YUV format you can ignore it in the DT.

The trace log show the pixel short line. Have a reference to below link to know the detail.

https://elinux.org/Jetson_TX2_Camera_BringUp

https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%2520Linux%2520Driver%2520Package%2520Development%2520Guide%2Fcamera_sensor_prog.html%23

I have fixed both of these issues.

I went away from the imx185 drivers because of the resolution issues seen. The imx290 driver I have provided a better mechanism for resolution definition thru the device trees. Yavta now reports the correct res. and uses all the info from the DTs as expected.

The problem with the SOF errors seen was clock sources. I had assumed that the clock source designation in the DT - specifically mclk_multplier and pix_clk_hz - would be the same as JP3.3. This is not true. The mclk_multipier seems to be used now which set the capture clock wrong - ultimately affecting the line lengths. I had to double the pix_clk_hz values (from 74250000 to 148500000) and put the mclk_multplier to 2.

With the above changes I can now capture and display multiplexed streams on VC0 and VC1.

You may need “serdes_pix_clk_hz” for FPGA design.

https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%2520Linux%2520Driver%2520Package%2520Development%2520Guide%2Fcamera_sensor_prog.html%23