SPI-app.cMISO and MOSI on Header 40 Pin connector?


I am working on the SPI for Jestson Orin AGX with jetpack release 5.1
I am working with the devKit, I am following Jetson Sensor Processing Engine (SPE) Developer Guide: SPI application (app/spi-app.c)
It says I must short MISO and MOSI that are accessible on connector J3. Are they also available somewhere on the 40 Pin connector ? if yes what are their default PIN numbers? If not how can you short these 2 signals on the J3 connector?
Thank you

Hi, these pins are connected to test points on board. You can get the position based on the assembly file in P3737_A04 package in DLC like below showing.

OK. Thank you.
So it looks like it is not accessible from the 40 pin header. But I would have to open the Module …and try locate these TP48 49 50 51…

That page I am following Jetson Sensor Processing Engine (SPE) Developer Guide: SPI application (app/spi-app.c) shows me how to configure the kernel for Spi 2. Can I configure Spi 1 the same way so I have the MISO/MOSI signals on the 40 pin header ?

Hi philippe12,

First, I would suggest updating to the latest JP5.1.2(R35.4.1).

Yes, you could short PIN19 (SPI1_MOSI) and PIN21(SPI1_MISO) on 40 pins header.

You could also refer to the following thread to verify SPI loopback test.
Jetson Nano SPI Bus Not Working - #10 by KevinFFF
Although it is on Jetson Nano, it should be similar steps for AGX Orin devkit.

Thank you.
Do you have by any chance the list of changes i need to make in the dtsi files for sp1 The document you pointed to only list the changes for spi 2.

For AGX Orin, which SPI interface would you like to use?



The SPI interface on 40-pin connector is SPI1.

I want to use SPI1 on the R5/SPE /FreeRTOS side.
I don t know how to change the .dtsi files ( values for pinmux, firewall, gpio…) in order to access SPI1 from R5/SPE/FreeRTOS

The example shown for SPE/FreeRTOS is for SPI2 but i need SPI1 (so I can access it through the 40 Pin Header).

I cannot find documentation on the meaning of these values in dtsi files ( ex: exclusion-info <3>. Why 3 ? Where is that explained?) So if you can provide me with the changes to do in the .dtsi files To have SPI1configured to be accessible from SPE/R5/FreeRTOS, that would be great!

What’s your use case for SPI1?
Could you share your block diagram of connections?

I would suggest you refer to the link I share to enable and verify SPI loopback test for SPI1 and you would better know how SPI working.

I am not sure we understand each other. I have no hardware block diagram to share. I am using the nvidia jetson Orin dev kit. On the dev kit i cannot test the SPI through 40 pin Header from code that would run on the R5. Unless i short the Test Points on the board as u showed me. This is very delicate to do (tiny access / delicate soldering).

I just want to understand your use case clearly. How do you connect the SPI and your devices?
If you are using the AGX Orin devkit, you could just get a cable shorting PIN19(SPI1_MOSI) and PIN21(SPI1_MISO) to verify SPI loopback test w/o any soldering.

Yes so if we short pin 19 and pin 21, we act on SPI1
The r5 code provided by Nvidia along with the changes to the .dtsi files are for SPI2 not for Spi1. Do you agree with this or do i misunderstand?
(So the loopback test does not work)

Should nt we short miso/mosi pins for spi2 for the test to work?

What do you mean about “r5 code”?
SPI1 and SPI2 are just different from spi address and node.
If you are going to use SPI2, then just short them for SPI loopback test.

What I mean by R5 Code is SPE Firmware. Sorry if I was not clear enough.
So my question still is : can we access SPI1 from SPE Firmware, and if yes how to configure the dtsi files?

(note: even if I short MISO/MOSI on the 40 Pin-header the SPI loopback test fails: 0xabcd is written but 0x0000 is read back)
I am using the spi-app.c provided by Nvidia and I followed the link ( as I mentioned before )Jetson Sensor Processing Engine (SPE) Developer Guide: SPI application (app/spi-app.c) to edit the dtsi files, compile and flash

What I mean SPI loopback test could work is just following the link I shared before. ( Jetson Nano SPI Bus Not Working - #10 by KevinFFF)

Just as @jachen mentioned, only modules within AON cluster are accessible for SPE firmware.
It seems only SPI2 is within AON cluster.

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