Hello, I am trying to modify and use version 35.4.1 L4T on the jetson-agx-xavier-industrial custom board.
The SPI-related pin configuration is as shown in DEVKIT. A photo is attached.
The configuration of tegra194-p2888-0001-p2888-0000-common.dtsi is as follows.
spi@c260000 { /*SPI2 STM32 */
status = "okay";
compatible = "nvidia,tegra186-spi";
cs-gpios = <&tegra_main_gpio TEGRA194_MAIN_GPIO(C, 3) GPIO_ACTIVE_LOW>;
spi@0 { /* chip select 0 */
compatible = "tegra-spidev";
reg = <0x0>;
spi-max-frequency = <50000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x11>;
};
};
};
spi@3210000 { /*SPI1 HOLT*/
status = "okay";
compatible = "nvidia,tegra186-spi";
cs-gpios =<&tegra_main_gpio TEGRA194_MAIN_GPIO(Z, 6) GPIO_ACTIVE_LOW>;
spi@0 { /* chip select 0 */
compatible = "tegra-spidev";
reg = <0x0>;
spi-max-frequency = <50000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x11>;
};
};
};
spi@3270000 { /*SPI3 NVRAM*/
status = "okay";
compatible = "nvidia,tegra186-spi";
cs-gpios = <&tegra_main_gpio TEGRA194_MAIN_GPIO(Y, 3) GPIO_ACTIVE_LOW>;
spi@0 { /* chip select 0 */
compatible = "tegra-spidev";
reg = <0x0>;
spi-max-frequency = <50000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x11>;
};
};
};
spi@3300000 {
status = "disable";
};
Booting does not occur properly in this configuration. Do I need to edit the device tree?
error_log.txt (74.8 KB)
Hi insu8897,
Is you issue about the boot up failed as following?
[ 34.789474] rcu: INFO: rcu_preempt detected stalls on CPUs/tasks:
[ 34.789867] rcu: 5-...!: (0 ticks this GP) idle=89c/0/0x0 softirq=352/352 fqs=0 (false positive?)
[ 34.790052] rcu: 6-...!: (4 ticks this GP) idle=758/0/0x0 softirq=368/369 fqs=0 (false positive?)
[ 34.790256] (detected by 1, t=5252 jiffies, g=-43, q=33)
[ 34.790367] Task dump for CPU 5:
Or SPI functional issue?
For SPI, it seems you have clock issue:
[ 10.264696] spi-tegra114 3270000.spi: can not get clock
[ 10.264874] spi-tegra114: probe of 3270000.spi failed with error -2
Do you have custom design in SPI different from the devkit?
@KevinFFF Hello, thank you for your reply.
spi@3270000 {
status = "disabled"; // typo ( Previously disable )
};
The booting problem has been resolved.
spi@c260000 { /*SPI2 STM32*/
status = "okay";
//cs-gpios = <&tegra_main_gpio TEGRA194_MAIN_GPIO(C, 3) GPIO_ACTIVE_LOW>;
spi@0 { /* chip select 0 */
compatible = "tegra-spidev";
reg = <0x0>;
spi-max-frequency = <33000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x11>;
};
};
};
spi@3210000 { /*SPI1 HOLT*/
status = "okay";
//cs-gpios =<&tegra_main_gpio TEGRA194_MAIN_GPIO(Z, 6) GPIO_ACTIVE_LOW>;
spi@0 { /* chip select 0 */
compatible = "tegra-spidev";
reg = <0x0>;
spi-max-frequency = <33000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x11>;
};
};
};
spi@3230000 { /*SPI3 NVRAM*/
status = "okay";
//cs-gpios = <&tegra_main_gpio TEGRA194_MAIN_GPIO(Y, 3) GPIO_ACTIVE_LOW>;
spi@0 { /* chip select 0 */
compatible = "tegra-spidev";
reg = <0x0>;
spi-max-frequency = <33000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x11>;
};
};
};
spi@3270000 {
status = "disabled";
};
spi@3300000 {
status = "disabled";
};
Currently, only spidev0.0 is confirmed in /dev.
error_log2.txt (351.9 KB)
There’re 3 SPI interfaces available for Xavier NX
SPI1: spi@3210000 → from PIN19/21/23/24/26 of 40-pins header
Is you issue specific to SPI3 not showing in dmesg?extracted_proc.dts as file here for further check.
$ sudo dtc -I fs -O dts -o extracted_proc.dts /proc/device-tree
@KevinFFF
root@jetson-agx-xavier-industrial:/sys/bus/spi/devices/spi0.0/of_node# sudo spidev_test -v -D /dev/spidev0.0
This applies to both spidev 0.0 and 2.0.
Have you shorted the MOSI and MISO for SPI1(spi@3210000) before running the test?
Is there any error log showing in dmesg?
@KevinFFF
Sorry this may be a bit of a question.
As for the hardware connection, SPI1, 2, and 3 are still connected as in the first question, and each CS-GPIOS is also set in the Device-tree.
cs-gpios = <&tegra_main_gpio TEGRA194_MAIN_GPIO(Y, 3) GPIO_ACTIVE_LOW>;
And I ultimately plan to loopback as well as communicate with nvram and other devices that are actually connected.
There is no error in dmesg.
dmesg grep spi :
I wondered if it was a pinmux problem, so I downloaded the Excel file and modified it as follows.
pinmux_cfg.txt (30.0 KB)
MUST.
loopback test is used to verify if the data can be sent from MOSI and received at MISO as expected.
Have you also run the sudo modprobe spidev to load the SPI driver?
@KevinFFF
tegra194-no-pll-aon-clock 에서 spi 인터페이스에 대한 clock을 설정해줘야하나요 ?
spi@3210000 {
clocks = <&bpmp_clks TEGRA194_CLK_SPI1>,
<&bpmp_clks TEGRA194_CLK_OSC>;
};
spi@c260000 {
clocks = <&bpmp_clks TEGRA194_CLK_SPI2>,
<&bpmp_clks TEGRA194_CLK_OSC>;
};
spi@3230000 {
clocks = <&bpmp_clks TEGRA194_CLK_SPI3>,
<&bpmp_clks TEGRA194_CLK_OSC>;
};
The SPI connection is normal as per the circuit above.
In the case of spidev spidriver, the kernel config was changed to =y instead of =m.
Please just keep the clock configuration for SPI as default and it should work.
system
July 31, 2024, 2:07am
13
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