Spidev read failed on xavier devkit

I want to use spi to read some device, so I enable spidev0.0, spidev1.0, spidev2.0. But there is no any signal on spi port when I test these port.

my device tree:

	spi@3210000 {
		compatible = "nvidia,tegra186-spi";
		reg = <0x0 0x3210000 0x0 0x10000>;
		interrupts = <0x0 0x24 0x4>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		iommus = <0x2 0x20>;
		dma-coherent;
		dmas = <0x1e 0xf 0x1e 0xf>;
		dma-names = "rx", "tx";
		spi-max-frequency = <0x3dfd240>;
		nvidia,clk-parents = "pll_p", "clk_m";
		clocks = <0x4 0x87 0x4 0x66 0x4 0xe>;
		clock-names = "spi", "pll_p", "clk_m";
		resets = <0x5 0x5b>;
		reset-names = "spi";
		status = "okay";
		linux,phandle = <0x172>;
		phandle = <0x172>;
		
		spidev@0 {
			compatible = "spidev";
			reg = <0x0>;
			spi-max-frequency = <0x1312d00>;
		};
		
	};

	spi@c260000 {
		compatible = "nvidia,tegra186-spi";
		reg = <0x0 0xc260000 0x0 0x10000>;
		interrupts = <0x0 0x25 0x4>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		iommus = <0x2 0x20>;
		dma-coherent;
		dmas = <0x1e 0x10 0x1e 0x10>;
		dma-names = "rx", "tx";
		spi-max-frequency = <0xb71b00>;
		nvidia,clk-parents = "pll_p", "osc";
		clocks = <0x4 0x88 0x4 0x5e 0x4 0x5b>;
		clock-names = "spi", "pll_p", "osc";
		resets = <0x5 0x5c>;
		reset-names = "spi";
		status = "okay";
		linux,phandle = <0x14b>;
		phandle = <0x14b>;
		
		spidev@0 {
			compatible = "spidev";
			reg = <0x0>;
			spi-max-frequency = <0x1312d00>;
		};

		imx204@0 {
			compatible = "nvidia,imx204-spi";
			reg = <0x0>;
			status = "disabled";
			spi-max-frequency = <0xb71b00>;
			physical_w = "4.713";
			physical_h = "3.494";
			delayed_gain = "true";
			devname = "imx204-spi";
			sensor_model = "imx204";
			focus_macro = "100";
			focus_infinity = "208";
			focus_max_slew_rate = "180";
			min_aperture = [32 00];
			max_aperture = "90";
			min_aperture_fnumber = "2000";
			max_aperture_fnumber = "22000";
			aperture_max_slew_rate = "180";
			fnumber_map = <0x7d0 0x2 0xaf0 0x22 0xfa0 0x31 0x15e0 0x3b 0x1f40 0x43 0x2af8 0x47 0x3e80 0x4b 0x55f0 0x4e>;
			reset-gpios = <0x13 0xc1 0x0>;
			linux,phandle = <0x146>;
			phandle = <0x146>;

			mode0 {
				mclk_khz = "72000";
				num_lanes = [38 00];
				tegra_sinterface = "serial_a";
				phy_mode = "SLVS";
				discontinuous_clk = "no";
				dpcm_enable = "false";
				cil_settletime = [30 00];
				active_w = "5352";
				active_h = "3950";
				pixel_t = "bayer_rggb";
				readout_orientation = [30 00];
				line_length = "6667";
				inherent_gain = [31 00];
				mclk_multiplier = "11";
				pix_clk_hz = "1320000000";
				min_gain_val = "1.0";
				max_gain_val = "22.3";
				min_hdr_ratio = [31 00];
				max_hdr_ratio = [31 00];
				min_framerate = "1.5";
				max_framerate = "60";
				min_exp_time = "13";
				max_exp_time = "33333";
			};

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@0 {
					reg = <0x0>;

					endpoint {
						port-index = <0x0>;
						bus-width = <0x8>;
						remote-endpoint = <0x2a>;
						linux,phandle = <0xa5>;
						phandle = <0xa5>;
					};
				};
			};
		};
	};

	spi@3230000 {
		compatible = "nvidia,tegra186-spi";
		reg = <0x0 0x3230000 0x0 0x10000>;
		interrupts = <0x0 0x26 0x4>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		iommus = <0x2 0x20>;
		dma-coherent;
		dmas = <0x1e 0x11 0x1e 0x11>;
		dma-names = "rx", "tx";
		spi-max-frequency = <0x3dfd240>;
		nvidia,clk-parents = "pll_p", "clk_m";
		clocks = <0x4 0x89 0x4 0x66 0x4 0xe>;
		clock-names = "spi", "pll_p", "clk_m";
		resets = <0x5 0x5d>;
		reset-names = "spi";
		status = "okay";
		linux,phandle = <0x173>;
		phandle = <0x173>;
		
		spidev@0 {
			compatible = "spidev";
			reg = <0x0>;
			spi-max-frequency = <0x1312d00>;
		};
		
	};

pinmux:

pinmux.0x0243d008 = 0x00000450; # spi3_miso_py1: rsvd1, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0243d060 = 0x00000400; # spi3_mosi_py2: rsvd1, tristate-enable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0243d028 = 0x00000400; # spi3_cs1_py4: rsvd1, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0243d048 = 0x00000400; # spi3_sck_py0: rsvd1, pull-down, tristate-enable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0243d018 = 0x00000400; # spi3_cs0_py3: rsvd1, pull-down, tristate-enable, input-disable, io_high_voltage-disable, lpdr-disable

pinmux.0x0243d040 = 0x00000400; # spi1_sck_pz3: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d020 = 0x00000450; # spi1_miso_pz4: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d058 = 0x00000400; # spi1_mosi_pz5: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d010 = 0x00000400; # spi1_cs0_pz6: rsvd1, pull-up, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d050 = 0x00000400; # spi1_cs1_pz7: rsvd1, pull-up, tristate-enable, input-enable, lpdr-disable


pinmux.0x0c302048 = 0x00000400; # spi2_sck_pcc0: spi2, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c302050 = 0x00000450; # spi2_miso_pcc1: spi2, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c302028 = 0x00000400; # spi2_mosi_pcc2: spi2, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c302038 = 0x00000400; # spi2_cs0_pcc3: spi2, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable

I use this command to update dtb:

sudo ./flash.sh -k kernel-dtb jetson-xavier mmcblk0p1

my test result:

spi mode: 0
bits per word: 8
max speed: 1000 Hz (1 KHz)
lsb mode: 0 

00 00 00 00 00 00 
00 00 

I use the devmem2 and found that the spi2 is right and the spi1 and spi3 are wrong, why? I do have changed the /JetPack_4.3_Linux_P2888/Linux_for_Tegra/bootloader/t186ref/BCT/tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg. Do I need to change dts file about pinmux or just adjust the cfg file?

spi2:
sudo devmem2 0x0c302050
/dev/mem opened.
Memory mapped at address 0x7f88664000.
Value at address 0xC302050 (0x7f88664050): 0x450

spi3:
 sudo devmem2 0x0243d008
/dev/mem opened.
Memory mapped at address 0x7fae042000.
Value at address 0x243D008 (0x7fae042008): 0x1

spi1:
sudo devmem2 0x0243d020
/dev/mem opened.
Memory mapped at address 0x7fa91e0000.
Value at address 0x243D020 (0x7fa91e0020): 0x55


what should I do to debug it?

I found some commands from TX2 SPI4

sudo devmem2 0x0243d040 w 0x400
sudo devmem2 0x0243d020 w 0x450
sudo devmem2 0x0243d058 w 0x400
sudo devmem2 0x0243d010 w 0x400
sudo devmem2 0x0243d050 w 0x400

I use these commands and I can get the signal on spi port, which means that the cfg pinmux doesn’t work. It is strange.
@ShaneCCC
I do have changed the cfg file.
I can know the dtb file has been changed in /sys/firmware/devicetree/ path. And I can find the spi dev in /dev folder.
but the cfg file seems that it doesn’t work by devmem2 command.

Did you flash the device again after modify the cfg file? What command to update it?

as my first post:

sudo ./flash.sh -k kernel-dtb jetson-xavier mmcblk0p1

To update cfg file need flash without -k

you mean if I want to update cfg file, I must reflash all images into xavier including the file system?

Yes, current the not support update cfg file only.

OK, I see. I reflash it and it works. Thank you.