Xavier SPI1 use spidev_test.c issue

Robotics & Edge Computing Jetson & Embedded Systems Jetson AGX Xavier
1

Hi guys,

finally, I enable the SPI1 on xavier.
firstly, I change the dts file to enable SPI1,

spi@c260000 {
		compatible = "nvidia,tegra186-spi";
		clocks = <0x4 0x88 0x4 0x5e 0x4 0x5b>;
		resets = <0x5 0x5c>;
		dma-coherent;
		clock-names = "spi", "pll_p", "osc";
		nvidia,clk-parents = "pll_p", "osc";
		status = "okay";
		#address-cells = <0x1>;
		interrupts = <0x0 0x25 0x4>;
		#size-cells = <0x0>;
		dma-names = "rx", "tx";
		phandle = <0x14b>;
		reg = <0x0 0xc260000 0x0 0x10000>;
		iommus = <0x2 0x20>;
		dmas = <0x1e 0x10 0x1e 0x10>;
		reset-names = "spi";
		linux,phandle = <0x14b>;
		spi-max-frequency = <0xb71b00>;

		spidev@0 {
			compatible = "spidev";
			reg = <0x0>;
			spi-max-frequency = <0x17d7840>;
		};
	};

and I flash the dtb to xavier and reboot it.
I can find spidev1.0 at /dev/, then I change the pinmux with devmem2 and the changed value is

Value at address 0x243D040 (0x7f88573040): 0x400
Value at address 0x243D020 (0x7fb70ec020): 0x450
Value at address 0x243D058 (0x7f9047a058): 0x400
Value at address 0x243D010 (0x7f7bfb8010): 0x400
Value at address 0x243D050 (0x7f78fd6050): 0x400

then I connect the MISO and MOSI of SPI1 of the extension header(p19 and p21)
x x

I connect the 2 x in the above picture.

but when I use spidev_test with

sudo ./spidev_test -v

the result is

xavier@xavier-desktop:~/Documents/tools/spi$ sudo ./spidev_test -v
spi mode: 0x0
bits per word: 8
max speed: 500000 Hz (500 KHz)
TX | FF FF FF FF FF FF 40 00 00 00 00 95 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F0 0D  | ......@....�..................�.
RX | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  | ................................

the receive data is not send data.
Can you find problem with my procedure?

2

Could you probe the signal to make sure of it?

3

thanks, Shane, do you mean to use an oscilloscope to show the MOSI signal?

4

I have another question about this, in this topic you say change the .cfg file can change the address

I find this file:tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg
at nvidia_sdk/JetPack_4.2_Linux_P2888/Linux_for_Tegra/bootloader/t186ref/BCT

pinmux.0x0243d040 = 0x00000400; # spi1_sck_pz3: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d020 = 0x00000450; # spi1_miso_pz4: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d058 = 0x00000400; # spi1_mosi_pz5: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d010 = 0x00000400; # spi1_cs0_pz6: rsvd1, pull-up, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d050 = 0x00000400; # spi1_cs1_pz7: rsvd1, pull-up, tristate-enable, input-enable, lpdr-disable

I modified it and use ./flash.sh -r -k kernel-dtb jetson-xavier mmcblk0p1
It doesn’t work, so I can only manually change the address value.

5

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