Tegra NX PCIe Reference Clock Design

Umm actually on the NX I see now that the clocks are managed by the dedicated clock processor, which initialises the PLL E by device tree. The forum post here says I can put this into the bpmp-fw-dtb:

clock@plle {
     clk-id = <0x200>;
     pll_freq_table = <0x249f000 0x5f5e100 0x2 0x7d 0x18 0xffffffff 0xffffffff 0xffffffff 0xffffffff>;
};

And flash:

sudo ./flash -r -k bpmp-fw-dtb jetson-tx2 mmcblk0p1

…but

  • I get a SHA2 signature error on boot, and NX is stuck in boot loop
  • If I do a full install (flash everything) the bootloop disappears, but SSC is still enabled (measure by oscilloscope)

Can you provide the necessary changes to the bpmp-fw-dtb, as well as instructions to flash with signature?