After we remove the "max-clk-limit = <400000>;" , the SDIO clock increase to 50MHz , we copy a 1GB file from SD card to ram, it takes 52 seconds(Read) , then copy the same file from ram to SD card(Write), it takes 30 seconds .
Compare to Jetson Nano EVB with the same test procedure , the SDIO clock is 208MHz , Read time is 12 seconds , write time is 22 seconds .
The Read / Write speed of EVB is much faster then our carrier board , how can we set the SDIO clock to 208MHz ? Is there any bug in circuit diagram ?
Another question is in EVB , VDD to SD card is +3.3V , but measured clock / data voltage is 1.8V , from the SD card specification , it only support 2.7~ 3.6V , is there any voltage level shifter in SDIO circuit?
I can’t tell for Nano because I don’t have these sources, but yes for TX2 or Xavier in R32.5.1 (kernel 4.9.201) the patch is there (sharing here only the comment for general understanding):
} else if (!fallback && (host->caps2 & MMC_CAP2_SLOT_REG_ALWAYS_ON)) {
/*
* With slot regulator always-on, SW reset does not power cycle
* the card. As a result, the card continues to stay in 1.8V
* mode from previous init cycle and sends S18A=0 in response to
* CMD8 even though it supports 1.8V signalling.
* Skip CMD11, set rocr to support 1.8V for S18A=0 response from
* the card if slot is fed from always-on supply and
* continue with UHS mode init.
* If S18A=0 response is due to an HS card plugin, all subsequent
* commands at 1.8V will fail and the host controller enumerates
* the card in HS mode in the next retry.
*/