The trouble with work to connect the can bus to the jetson nano devkit

Hi all!
I am new to jetson and I am trying to connect can bus (mcp2515 8000000hz) to jetson nano dev kit. But I can’t get the script to see my dtbo file. There was already a similar topic on the forum (, I updated to jetpack 4.6.4, but the trick that is given there did not work. But there was a clue:
cat …/compatible - “nvidia,p3449-0000-b00+p3448-0000-b00nvidia,jetson-nanonvidia,tegra210”

“fdtget /boot/dtb/*.dtb / compatible” - “nvidia,p3449-0000-b00+p3448-0000-b00 nvidia,jetson-nano nvidia,tegra210”.

The system already had a pre-installed file - tegra210-p3448-0000-p3449-0000-a02-mcp251x.dtbo, and it is miraculously visible to the jetson-io script, however with it I have an error:
MCP251x didnt enter in conf mode after reset.
Probe failed, err=16.
I tried to uncompile it to find out the secret of its success, but the DTC throws an error in the process. This guy’s solution - ( seemed to be the most workable, (he is often referenced in other topics) but also failed here. Please answer my prayer.
Here is some information about me:
NVIDIA NVIDIA Jetson Nano Developer Kit
L4T 32.7.4 [ JetPack UNKNOWN ] - don’t know if this is normal?
Ubuntu 18.04.6LTS
Kernel Version: 4.9.337-tegra
anyway here are the versions of the jetpacks

sudo apt-cache show nvidia-jetpack | grep “Version”
Version: 4.6.4-b39
Version: 4.6.3-b17
Version: 4.6.2-b5
Version: 4.6.1-b110

cat nvidia,dtsfilename output - …/…/hardware/nvidia/platform/t210/porg/kernel-dts/tegra210-p3448-0000-p3449-0000-b00.dts
I connect:
int - pin31
sck - pin23
si - pin19
so - pin21
cs - pin24
gnd - gnd
vcc1 - pin5v
vcc - pin3.3v

May I know is your issue about or SPI or CAN on your Jetson Nano devkit?

You could verify SPI loopback test first to make sure it works as expected.

Good afternoon, yes does not see my dtbo files that I offer it to the /boot/ folder. I compile all dtbo files here ( Please tell us more about the SPI loopback test.

Is this guide ( suitable for testing SPI if it is intended for tx1?

If you are using the custom board for Jetson Nano, Jetson-IO might not work for your board.
You could refer to the following thread step-by-step for SPI loopback test.
Jetson Nano SPI Bus Not Working - #10 by KevinFFF

I apologize for my sluggishness, but I have the same problem as the user jcl9309, I uncompiled the entire contents of the /boot/ folder and even /boot/dtb , but I did not find the part with such content:
gpio_default: default {
gpio-input = <
@@ -49,11 +44,6 @@

Could something have changed since you posted this step by step guide?

I figured out a little in the code of my tegra210-p3448-0000-p3449-0000-b00.dtb and found that gpio_default in my case is in this form:
default {
gpio-input = <0xd8 0xc 0xd 0xe 0xf 0xe8 0x26 0x95 0x5 0xbc 0xbd 0xbe 0xc1 0xc2 0xa8 0xc8 0xca 0x4d 0x4e 0x4c 0x4f 0x32 0x33 0x10 0 x11 0x12 0x13 0x14 0x3a 0x3d 0x3e 0x41 0xe4>;
Only I do not understand how to correlate their HEX number with the one you provided in order to delete it correctly.

You could refer to the following thread to modify the gpio-input.
Problem with SPI in Jetson Nano - #14 by KevinFFF

I did all the steps you suggested on a freshly installed system and still I see this output from spidev_test:
sudo ./spidev_test -D /dev/spidev0.0 -v -p “HelloWorld123456789abcdef”
spi mode: 0x0
bits per word: 8
max speed: 500000 Hz (500 KHz)
TX | 48 65 6C 6C 6F 57 6F 72 6C 64 31 32 33 34 35 36 37 38 39 61 62 63 64 65 66
__ | HelloWorld123456789abcdef
Rx | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 __ | …
I even got an oscilloscope and checked it (just in case), but still no result.

Do you connect MOSI/MISO before the test?

Could you share to result of the following command?

$ sudo cat /sys/kernel/debug/tegra_pinctrl_reg | grep -i spi

and also share the dmesg as file here for further check.

Good afternoon, yes I did a jumper between MOSI and MISO.
Here is the result of the command and the dmesg file:

sudo cat /sys/kernel/debug/tegra_pinctrl_reg | grep -i spi

Bank: 1 Reg: 0x70003050 Val: 0x0000e044 → spi1_mosi_pc0
Bank: 1 Reg: 0x70003054 Val: 0x0000e044 → spi1_miso_pc1
Bank: 1 Reg: 0x70003058 Val: 0x0000e044 → spi1_sck_pc2
Bank: 1 Reg: 0x7000305c Val: 0x0000e048 → spi1_cs0_pc3
Bank: 1 Reg: 0x70003060 Val: 0x0000e048 → spi1_cs1_pc4
Bank: 1 Reg: 0x70003064 Val: 0x00006046 → spi2_mosi_pb4
Bank: 1 Reg: 0x70003068 Val: 0x00006046 → spi2_miso_pb5
Bank: 1 Reg: 0x7000306c Val: 0x00006046 → spi2_sck_pb6
Bank: 1 Reg: 0x70003070 Val: 0x00006046 → spi2_cs0_pb7
Bank: 1 Reg: 0x70003074 Val: 0x00006045 → spi2_cs1_pdd0
Bank: 1 Reg: 0x70003078 Val: 0x0000e015 → spi4_mosi_pc7
Bank: 1 Reg: 0x7000307c Val: 0x0000e015 → spi4_miso_pd0
Bank: 1 Reg: 0x70003080 Val: 0x0000e015 → spi4_sck_pc5
Bank: 1 Reg: 0x70003084 Val: 0x0000e015 → spi4_cs0_pc6
Bank: 1 Reg: 0x70003088 Val: 0x00002040 → qspi_sck_pee0
Bank: 1 Reg: 0x7000308c Val: 0x00002000 → qspi_cs_n_pee1
Bank: 1 Reg: 0x70003090 Val: 0x00002040 → qspi_io0_pee2
Bank: 1 Reg: 0x70003094 Val: 0x00002040 → qspi_io1_pee3
Bank: 1 Reg: 0x70003098 Val: 0x00002040 → qspi_io2_pee4
Bank: 1 Reg: 0x7000309c Val: 0x00002040 → qspi_io3_pee5
Bank: 0 Reg: 0x70000b70 Val: 0x00000001 →
Bank: 0 Reg: 0x70000b78 Val: 0x00000001 → drive_qspi_lpbk_control
Bank: 0 Reg: 0x70000a78 Val: 0x00808000 → drive_qspi_comp

dmesg_out.txt (58.8 KB)

The register value seems not as expected.
Have you confirmed the SPI pins been removed the GPIO usage correctly?

I don’t see any SPI loaded in your dmesg.
Do you run the following command to load spidev?

$ sudo modprobe spidev

I solved my problem by making a UART to SPI adapter using an arduino nano board. I was afraid that this would not work, but I managed to send frames to CAN every 100ms. I think it can be even faster. If someone needs this life hack, I can attach instructions.

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