Can you provide the Z-height dimensions and tolerance of Chip 1, component 2 and 7 which locations are as below picture?
We need this data to do tolerance analysis for thermal pad thickness. Thank you.
The data for SoC is 1.36mm min – 1.51mm nom – 1.66mm max.
Hi Trumany,
Could you also provide the z height dimensions and tolerance info for component 2 and 7?
Thanks,
David
We do not provide the detailed height information for components other than the SoC. You can use the Envelope model heights in those locations as the maximum height. In the Thermal DG, it suggests using a more flexible TIM if contact with those components is necessary.
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