TX1 Custom Carrier Board

I have finished a custom design of our own for the TX1 SOM. We are getting ready to build it. Is it possible to have someone at NVIDIA to review my schematic design? Maybe one of those that was involved in the Jetson carrier board development. I have gone through all the documentation the best I can but want to make sure I am not missing anything. Just trying to make our first prototype as successful as possible.

At least answer these few things if anything. I have been going heavily through the documentation, especially the design guide.

  • Only using a 4-lane MIPI interface of CSI0 and CSI1. I have nothing connected to CSI2-5. I have nothing tied to the unused pins. Are they OK to be left floating?
  • I am not using the display connections DSI0-3. I have nothing tied to the unused pins. Are they OK to be left floating?
  • I am not using the eDP display connections.I have nothing tied to the unused pins. Are they OK to be left floating?
  • I am not using PEx0-2. The design guide suggested any of the unused receiver inputs to tied them to GND which I have done. The rest of the unused pins are left floating, is that OK?
  • Not using the SATA port. I have nothing tied to the unused pins. Are they OK to be left floating?
  • I am not using the Gigabit Ethernet interface. I have nothing tied to the unused pins. Are they OK to be left floating?
  • I am not using either CAN0 or CAN1. I have nothing tied to the unused pins. Are they OK to be left floating?
  • I am not using any of the external BT or Wi-FI connections. I am actually re-purposing the I2C, GPIO, and UART for other board functions. I have left the SDIO interface unconnected. Is the SDIO interface OK to be left floating?

I can tell you right now, you’re not going to hear back from big N. Sorry bud.

Try asking the guys at auvidea they made 2 carrier boards and are in the process of making a third one.

Thanks for the feedback guys. Early on I would find NVIDIA on these forums but nothing as of late. I might reach out to auvidea.

Hi snageli,

For me all is ok except for SATA lines : RX lanes are said to be grounded if unused.
Have a look at page 65 of the OEM Design Guide for unused interfaces, most of which you’re interested in are listed ;).

But then I understand for you that a NVIDIA confirmation could help but they could be busy with the european TX1 release coming :/

regards,
Ale

There is discussion about how to connect unused pins in this document:
http://developer.nvidia.com/embedded/dlc/jetson-tx1-oem-product-design-guide

Page 42 says there’s ESD shielding on the CSI lanes…I don’t see where it specifies whether they are internal pull-ups or pull-downs. I’ll ask our product engineering team. I think Dustin and Auvidea have been sorting this out as well.

All these interfaces can be leave as NC except PEX_RX±/USB_RX±/SATA_RX± are suggested to connect to GND if not used.

Hi snageli,

Most unused pins connection are contained in jetson-tx1-oem-product-design-guide, also please see my comments for each question.
http://developer.nvidia.com/embedded/dlc/jetson-tx1-oem-product-design-guide

  • Only using a 4-lane MIPI interface of CSI0 and CSI1. I have nothing connected to CSI2-5. I have nothing tied to the unused pins. Are they OK to be left floating?
    -> OK.

  • I am not using the display connections DSI0-3. I have nothing tied to the unused pins. Are they OK to be left floating?
    -> OK.

  • I am not using the eDP display connections.I have nothing tied to the unused pins. Are they OK to be left floating?
    -> OK.

  • I am not using PEx0-2. The design guide suggested any of the unused receiver inputs to tied them to GND which I have done. The rest of the unused pins are left floating, is that OK?
    -> OK.

  • Not using the SATA port. I have nothing tied to the unused pins. Are they OK to be left floating?
    -> Tie receiver inputs to GND, leave the rest NC.

  • I am not using the Gigabit Ethernet interface. I have nothing tied to the unused pins. Are they OK to be left floating?

  • OK.

  • I am not using either CAN0 or CAN1. I have nothing tied to the unused pins. Are they OK to be left floating?

  • OK.

  • I am not using any of the external BT or Wi-FI connections. I am actually re-purposing the I2C, GPIO, and UART for other board functions. I have left the SDIO interface unconnected. Is the SDIO interface OK to be left floating?
    -> OK.

Confirmed.