Agreed, I’ll flash an older jetpack version onto a Jetson and test this on the devkit also.
Excuse my lack of device tree knowledge. I performed a grep for nvdisplay in the device tree sources and this reported a many instances. Would it be possible to advise where I should disable nvdisplay? This will save me a long time searching through the sources.
platform/t19x/jakku/kernel-dts/tegra194-p3668-all-p3509-0000-kexec.dts:103: nvdisplay@15200000 {
platform/t19x/jakku/kernel-dts/tegra194-p3668-all-p3509-0000-kexec.dts:106: nvdisplay@15210000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-c03-00-dsi-hdmi-hdmi-imx274-hdmiin.dts:27: nvdisplay@15200000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-c03-00-dsi-hdmi-hdmi-imx274-hdmiin.dts:33: nvdisplay@15210000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-c03-00-dsi-hdmi-hdmi-imx274-hdmiin.dts:39: nvdisplay@15220000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-c03-00-dsi-hdmi-dp.dts:25: nvdisplay@15200000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-c03-00-dsi-hdmi-dp.dts:30: nvdisplay@15210000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-c03-00-dsi-hdmi-dp.dts:35: nvdisplay@15220000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-a00-00-base.dts:332: nvdisplay@15200000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-a00-00-base.dts:336: nvdisplay@15220000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-a00-00-edp.dts:47: nvdisplay@15200000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-c00-00-auo-1080p-edp.dts:49: nvdisplay@15200000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-as-0888-base.dts:294: nvdisplay@15200000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-as-0888-base.dts:298: nvdisplay@15220000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-a00-00-imx185_v1.dts:314: nvdisplay@15200000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-a00-00-imx185_v1.dts:318: nvdisplay@15220000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3489-0888-a00-00-base.dts:310: nvdisplay@15200000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3489-0888-a00-00-base.dts:314: nvdisplay@15220000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-a00-00-dsi-dp.dts:25: nvdisplay@15210000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-a00-00-dsi-dp.dts:30: nvdisplay@15220000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-c03-00-dsi-dp.dts:25: nvdisplay@15210000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-c03-00-dsi-dp.dts:30: nvdisplay@15220000 {
platform/t18x/quill/kernel-dts/tegra186-quill-hdmi-primary-p3310-1000-a00-00.dts:25: nvdisplay@15200000 {
platform/t18x/quill/kernel-dts/tegra186-quill-hdmi-primary-p3310-1000-a00-00.dts:30: nvdisplay@15210000 {
platform/t18x/quill/kernel-dts/tegra186-quill-hdmi-primary-p3310-1000-a00-00.dts:35: nvdisplay@15220000 {
platform/t18x/quill/kernel-dts/tegra186-quill-hdmi-primary-p3310-1000-c03-00.dts:25: nvdisplay@15200000 {
platform/t18x/quill/kernel-dts/tegra186-quill-hdmi-primary-p3310-1000-c03-00.dts:30: nvdisplay@15210000 {
platform/t18x/quill/kernel-dts/tegra186-quill-hdmi-primary-p3310-1000-c03-00.dts:35: nvdisplay@15220000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-a00-00-dsi-hdmi-dp.dts:25: nvdisplay@15200000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-a00-00-dsi-hdmi-dp.dts:30: nvdisplay@15210000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-a00-00-dsi-hdmi-dp.dts:35: nvdisplay@15220000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3489-1000-a00-00-base.dts:310: nvdisplay@15200000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3489-1000-a00-00-base.dts:314: nvdisplay@15220000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-c03-00-dsi-hdmi-hdmi.dts:25: nvdisplay@15200000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-c03-00-dsi-hdmi-hdmi.dts:31: nvdisplay@15210000 {
platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-c03-00-dsi-hdmi-hdmi.dts:37: nvdisplay@15220000 {
platform/t18x/lanai/kernel-dts/tegra186-p3636-0002-lanai.dts:167: nvdisplay@15200000 {
platform/t18x/lanai/kernel-dts/tegra186-p3636-0002-lanai.dts:171: nvdisplay@15210000 {
platform/t18x/lanai/kernel-dts/tegra186-p3636-0002-lanai.dts:174: nvdisplay@15220000 {
platform/t18x/lanai/kernel-dts/tegra186-p3636-0002-p3509-0000-a01.dts:167: nvdisplay@15200000 {
platform/t18x/lanai/kernel-dts/tegra186-p3636-0002-p3509-0000-a01.dts:174: nvdisplay@15210000 {
platform/t18x/lanai/kernel-dts/tegra186-p3636-0001-p3509-0000-a01.dts:171: nvdisplay@15200000 {
platform/t18x/lanai/kernel-dts/tegra186-p3636-0001-p3509-0000-a01.dts:178: nvdisplay@15210000 {
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:110: <&bpmp_clks TEGRA194_CLK_NVDISPLAYHUB>,
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:111: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_DISP>,
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:112: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P0>,
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:113: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P1>,
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:114: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P2>,
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:210: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P3>,
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:234: <&bpmp_clks TEGRA194_CLK_NAFLL_NVDISPLAYHUB>,
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:426: "nvdisplayhub",
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:427: "nvdisplay_disp",
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:428: "nvdisplay_p0",
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:429: "nvdisplay_p1",
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:430: "nvdisplay_p2",
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:526: "nvdisplay_p3",
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:550: "nafll_nvdisplayhub",
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:696: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_HEAD0>,
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:697: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_HEAD1>,
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:698: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_HEAD2>,
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:699: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_HEAD3>,
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:700: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_MISC>,
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:701: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP0>,
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:702: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP1>,
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:703: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP2>,
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:704: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP3>,
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:705: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP4>,
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:706: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP5>,
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:842: "nvdisplay0_head0",
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:843: "nvdisplay0_head1",
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:844: "nvdisplay0_head2",
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:845: "nvdisplay0_head3",
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:846: "nvdisplay0_misc",
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:847: "nvdisplay0_wgrp0",
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:848: "nvdisplay0_wgrp1",
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:849: "nvdisplay0_wgrp2",
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:850: "nvdisplay0_wgrp3",
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:851: "nvdisplay0_wgrp4",
soc/t19x/kernel-dts/tegra194-soc/mods-simple-bus.dtsi:852: "nvdisplay0_wgrp5",
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:401: nvdisplay_domain {
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:402: address-space = <&nvdisplay_as>;
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:403: sid-list = <TEGRA_SID(NVDISPLAY)>;
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:549: nvdisplay_as: nvdisplay {
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1060: head0: nvdisplay@15200000 {
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1066: iommus = <&smmu TEGRA_SID_NVDISPLAY>;
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1073: clock-names = "nvdisplay_disp",
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1074: "nvdisplayhub", "nvdisplay_p0",
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1075: "nvdisplay_p1", "nvdisplay_p2",
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1076: "nvdisplay_p3", "pllp_display",
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1080: clocks = <&bpmp_clks TEGRA194_CLK_NVDISPLAY_DISP>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1081: <&bpmp_clks TEGRA194_CLK_NVDISPLAYHUB>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1082: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P0>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1083: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P1>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1084: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P2>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1085: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P3>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1094: resets = <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_MISC>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1095: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP0>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1096: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP1>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1097: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP2>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1098: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP3>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1099: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP4>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1100: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP5>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1101: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_HEAD0>;
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1118: }; //nvdisplay@15200000
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1120: head1: nvdisplay@15210000 {
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1126: iommus = <&smmu TEGRA_SID_NVDISPLAY>;
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1133: clock-names = "nvdisplay_disp",
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1134: "nvdisplayhub", "nvdisplay_p0",
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1135: "nvdisplay_p1", "nvdisplay_p2",
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1136: "nvdisplay_p3", "pllp_display",
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1140: clocks = <&bpmp_clks TEGRA194_CLK_NVDISPLAY_DISP>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1141: <&bpmp_clks TEGRA194_CLK_NVDISPLAYHUB>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1142: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P0>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1143: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P1>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1144: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P2>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1145: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P3>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1154: resets = <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_MISC>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1155: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP0>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1156: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP1>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1157: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP2>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1158: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP3>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1159: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP4>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1160: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP5>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1161: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_HEAD1>;
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1178: }; //nvdisplay@15210000
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1180: head2: nvdisplay@15220000 {
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1186: iommus = <&smmu TEGRA_SID_NVDISPLAY>;
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1193: clock-names = "nvdisplay_disp",
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1194: "nvdisplayhub", "nvdisplay_p0",
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1195: "nvdisplay_p1", "nvdisplay_p2",
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1196: "nvdisplay_p3", "pllp_display",
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1200: clocks = <&bpmp_clks TEGRA194_CLK_NVDISPLAY_DISP>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1201: <&bpmp_clks TEGRA194_CLK_NVDISPLAYHUB>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1202: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P0>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1203: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P1>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1204: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P2>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1205: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P3>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1214: resets = <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_MISC>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1215: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP0>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1216: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP1>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1217: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP2>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1218: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP3>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1219: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP4>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1220: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP5>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1221: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_HEAD2>;
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1238: }; //nvdisplay@15220000
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1240: head3: nvdisplay@15230000 {
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1246: iommus = <&smmu TEGRA_SID_NVDISPLAY>;
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1253: clock-names = "nvdisplay_disp",
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1254: "nvdisplayhub", "nvdisplay_p0",
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1255: "nvdisplay_p1", "nvdisplay_p2",
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1256: "nvdisplay_p3", "pllp_display",
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1260: clocks = <&bpmp_clks TEGRA194_CLK_NVDISPLAY_DISP>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1261: <&bpmp_clks TEGRA194_CLK_NVDISPLAYHUB>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1262: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P0>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1263: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P1>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1264: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P2>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1265: <&bpmp_clks TEGRA194_CLK_NVDISPLAY_P3>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1274: resets = <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_MISC>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1275: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP0>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1276: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP1>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1277: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP2>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1278: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP3>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1279: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP4>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1280: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_WGRP5>,
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1281: <&bpmp_resets TEGRA194_RESET_NVDISPLAY0_HEAD3>;
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-base.dtsi:1298: }; //nvdisplay@15230000
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-presi/tegra194-presi-prod-reference.dtsi:1483: 0 0x00000014 0x00001800 0x00000000>; //TSA_CONFIG_STATIC0_CSR_NVDISPLAYR_0
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-virt.dtsi:69: * nvdisplay, vi and vi-thi */
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-virt.dtsi:71: nvdisplay@15200000 {
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-virt.dtsi:76: nvdisplay@15210000 {
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-virt.dtsi:81: nvdisplay@15220000 {
soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-virt.dtsi:86: nvdisplay@15230000 {
soc/t18x/kernel-dts/tegra186-soc/mods-simple-bus.dtsi:110: <&tegra_car TEGRA186_CLK_NVDISPLAY_P0>,
soc/t18x/kernel-dts/tegra186-soc/mods-simple-bus.dtsi:111: <&tegra_car TEGRA186_CLK_NVDISPLAY_P1>,
soc/t18x/kernel-dts/tegra186-soc/mods-simple-bus.dtsi:112: <&tegra_car TEGRA186_CLK_NVDISPLAY_P2>,
soc/t18x/kernel-dts/tegra186-soc/mods-simple-bus.dtsi:247: "nvdisplay_p0",
soc/t18x/kernel-dts/tegra186-soc/mods-simple-bus.dtsi:248: "nvdisplay_p1",
soc/t18x/kernel-dts/tegra186-soc/mods-simple-bus.dtsi:249: "nvdisplay_p2",
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:247: TEGRA_SID(NVDISPLAY) TEGRA_SID(NVCSI)
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:920: iommus = <&smmu TEGRA_SID_NVDISPLAY>;
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:926: head0: nvdisplay@15200000 {
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:931: iommus = <&smmu TEGRA_SID_NVDISPLAY>;
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:935: clocks = <&tegra_car TEGRA186_CLK_NVDISPLAY_DISP>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:936: <&tegra_car TEGRA186_CLK_NVDISPLAYHUB>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:937: <&tegra_car TEGRA186_CLK_NVDISPLAY_P0>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:938: <&tegra_car TEGRA186_CLK_NVDISPLAY_P1>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:939: <&tegra_car TEGRA186_CLK_NVDISPLAY_P2>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:940: <&tegra_car TEGRA186_CLK_NVDISPLAY_DSC>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:947: clock-names = "nvdisplay_disp",
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:948: "nvdisplayhub", "nvdisplay_p0",
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:949: "nvdisplay_p1", "nvdisplay_p2", "nvdisp_dsc",
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:952: resets = <&tegra_car TEGRA186_RESET_NVDISPLAY0_MISC>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:953: <&tegra_car TEGRA186_RESET_NVDISPLAY0_WGRP0>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:954: <&tegra_car TEGRA186_RESET_NVDISPLAY0_WGRP1>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:955: <&tegra_car TEGRA186_RESET_NVDISPLAY0_WGRP2>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:956: <&tegra_car TEGRA186_RESET_NVDISPLAY0_WGRP3>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:957: <&tegra_car TEGRA186_RESET_NVDISPLAY0_WGRP4>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:958: <&tegra_car TEGRA186_RESET_NVDISPLAY0_WGRP5>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:959: <&tegra_car TEGRA186_RESET_NVDISPLAY0_HEAD0>;
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:984: head1: nvdisplay@15210000 {
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:989: iommus = <&smmu TEGRA_SID_NVDISPLAY>;
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:993: clocks = <&tegra_car TEGRA186_CLK_NVDISPLAY_DISP>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:994: <&tegra_car TEGRA186_CLK_NVDISPLAYHUB>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:995: <&tegra_car TEGRA186_CLK_NVDISPLAY_P0>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:996: <&tegra_car TEGRA186_CLK_NVDISPLAY_P1>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:997: <&tegra_car TEGRA186_CLK_NVDISPLAY_P2>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:998: <&tegra_car TEGRA186_CLK_NVDISPLAY_DSC>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1005: clock-names = "nvdisplay_disp",
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1006: "nvdisplayhub", "nvdisplay_p0",
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1007: "nvdisplay_p1", "nvdisplay_p2", "nvdisp_dsc",
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1010: resets = <&tegra_car TEGRA186_RESET_NVDISPLAY0_MISC>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1011: <&tegra_car TEGRA186_RESET_NVDISPLAY0_WGRP0>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1012: <&tegra_car TEGRA186_RESET_NVDISPLAY0_WGRP1>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1013: <&tegra_car TEGRA186_RESET_NVDISPLAY0_WGRP2>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1014: <&tegra_car TEGRA186_RESET_NVDISPLAY0_WGRP3>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1015: <&tegra_car TEGRA186_RESET_NVDISPLAY0_WGRP4>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1016: <&tegra_car TEGRA186_RESET_NVDISPLAY0_WGRP5>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1017: <&tegra_car TEGRA186_RESET_NVDISPLAY0_HEAD1>;
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1042: head2: nvdisplay@15220000 {
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1047: iommus = <&smmu TEGRA_SID_NVDISPLAY>;
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1051: clocks = <&tegra_car TEGRA186_CLK_NVDISPLAY_DISP>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1052: <&tegra_car TEGRA186_CLK_NVDISPLAYHUB>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1053: <&tegra_car TEGRA186_CLK_NVDISPLAY_P0>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1054: <&tegra_car TEGRA186_CLK_NVDISPLAY_P1>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1055: <&tegra_car TEGRA186_CLK_NVDISPLAY_P2>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1056: <&tegra_car TEGRA186_CLK_NVDISPLAY_DSC>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1061: clock-names = "nvdisplay_disp",
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1062: "nvdisplayhub", "nvdisplay_p0",
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1063: "nvdisplay_p1", "nvdisplay_p2", "nvdisp_dsc",
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1066: resets = <&tegra_car TEGRA186_RESET_NVDISPLAY0_MISC>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1067: <&tegra_car TEGRA186_RESET_NVDISPLAY0_WGRP0>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1068: <&tegra_car TEGRA186_RESET_NVDISPLAY0_WGRP1>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1069: <&tegra_car TEGRA186_RESET_NVDISPLAY0_WGRP2>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1070: <&tegra_car TEGRA186_RESET_NVDISPLAY0_WGRP3>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1071: <&tegra_car TEGRA186_RESET_NVDISPLAY0_WGRP4>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1072: <&tegra_car TEGRA186_RESET_NVDISPLAY0_WGRP5>,
soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-base.dtsi:1073: <&tegra_car TEGRA186_RESET_NVDISPLAY0_HEAD2>;
platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-quill-power-tree-p3310-1000-a00-00.dtsi:43: nvdisplay@15200000 {
platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-quill-power-tree-p3310-1000-a00-00.dtsi:56: nvdisplay@15210000 {
platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-quill-power-tree-p3310-1000-a00-00.dtsi:61: nvdisplay@15220000 {
platform/t18x/common/kernel-dts/t18x-common-platforms/mods-display.dtsi:20: nvdisplay@15200000 {
platform/t18x/common/kernel-dts/t18x-common-platforms/mods-display.dtsi:31: nvdisplay@15210000 {
platform/t18x/common/kernel-dts/t18x-common-platforms/mods-display.dtsi:42: nvdisplay@15220000 {
platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-quill-common.dtsi:258: nvdisplay@15200000 {
platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-quill-common.dtsi:271: nvdisplay@15210000 {
platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-quill-common.dtsi:285: nvdisplay@15220000 {
platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-quill-power-tree-p3489-1000-a00-00.dtsi:43: nvdisplay@15200000 {
platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-quill-power-tree-p3489-1000-a00-00.dtsi:56: nvdisplay@15210000 {
platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-quill-power-tree-p3489-1000-a00-00.dtsi:61: nvdisplay@15220000 {
platform/t18x/common/kernel-dts/t18x-common-plugin-manager/tegra186-quill-p3489-1000-a00-plugin-manager.dtsi:67: nvdisplay@15200000 {
platform/t18x/common/kernel-dts/t18x-common-plugin-manager/tegra186-quill-p3489-1000-a00-plugin-manager.dtsi:72: nvdisplay@15210000 {
platform/t18x/common/kernel-dts/t18x-common-plugin-manager/tegra186-quill-p3489-1000-a00-plugin-manager.dtsi:77: nvdisplay@15220000 {
platform/t18x/common/kernel-dts/t18x-common-plugin-manager/tegra186-odm-data-plugin-manager.dtsi:98: nvdisplay@15200000 {
platform/t18x/common/kernel-dts/t18x-common-plugin-manager/tegra186-odm-data-plugin-manager.dtsi:102: nvdisplay@15210000 {
platform/t18x/common/kernel-dts/t18x-common-plugin-manager/tegra186-odm-data-plugin-manager.dtsi:106: nvdisplay@15220000 {
platform/t18x/common/kernel-dts/t18x-common-plugin-manager/tegra186-quill-p3310-1000-a00-plugin-manager.dtsi:320: nvdisplay@15200000 {
platform/t18x/common/kernel-dts/t18x-common-plugin-manager/tegra186-quill-p3310-1000-a00-plugin-manager.dtsi:325: nvdisplay@15210000 {
platform/t18x/common/kernel-dts/t18x-common-plugin-manager/tegra186-quill-p3310-1000-a00-plugin-manager.dtsi:330: nvdisplay@15220000 {
platform/t18x/common/kernel-dts/t18x-common-plugin-manager/tegra186-quill-display-plugin-manager.dtsi:35: nvdisplay@15200000 {
platform/t18x/common/kernel-dts/t18x-common-plugin-manager/tegra186-quill-display-plugin-manager.dtsi:86: nvdisplay@15200000 {
platform/t18x/common/kernel-dts/t18x-common-plugin-manager/tegra186-quill-display-plugin-manager.dtsi:145: nvdisplay@15200000 {
platform/t18x/common/kernel-dts/t18x-common-plugin-manager/tegra186-quill-display-plugin-manager.dtsi:161: nvdisplay@15200000 {
platform/t18x/common/kernel-dts/t18x-common-plugin-manager/tegra186-quill-p3489-0888-mimic-plugin-manager.dtsi:277: nvdisplay@15220000 {
platform/t18x/lanai/kernel-dts/common/tegra186-p3636-0001-a00-power-tree.dtsi:66: nvdisplay@15200000 {
platform/t18x/lanai/kernel-dts/common/tegra186-p3636-0001-a00-power-tree.dtsi:82: nvdisplay@15210000 {
platform/t18x/lanai/kernel-dts/common/tegra186-p3636-0001-a00-power-tree.dtsi:98: nvdisplay@15220000 {
platform/t18x/lanai/kernel-dts/common/tegra186-p3636-0001-a00-disp.dtsi:25: nvdisplay@15200000 {
platform/t18x/lanai/kernel-dts/common/tegra186-p3636-0001-a00-disp.dtsi:38: nvdisplay@15210000 {
platform/t18x/lanai/kernel-dts/common/tegra186-p3636-0001-a00-disp.dtsi:52: nvdisplay@15220000 {
platform/t18x/lanai/kernel-dts/common/tegra186-p3636-0001-odm-data-plugin-manager.dtsi:99: nvdisplay@15200000 {
platform/t18x/lanai/kernel-dts/common/tegra186-p3636-0001-odm-data-plugin-manager.dtsi:107: nvdisplay@15210000 {
platform/t18x/lanai/kernel-dts/common/tegra186-p3636-0001-odm-data-plugin-manager.dtsi:115: nvdisplay@15220000 {