This is on Jetpack 3.3
I am unsuccessfully trying to configure the USB lane mapping for configuration 1 on the TX2i. The main goal is to switch enable PCIe on PEX1. I was successfully able to follow the instructions in the following link to get the it working on the TX2.
Trying to follow this same process for the TX2i has not been successful. Below are the configuration changes I made to the device tree:
I set ODMDATA=0x90000 in p2771-0000.conf.common.
In tegra186-quill-p3489-1000-a00-plugin-manager.dtsi and tegra186-quill-p3489-1000-a00-00-base.dts set xhci@3530000 with
phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>;
phy-names = “utmi-0”;
In tegra186-quill-p3489-1000-a00-00-base.dts set the status to disabled for usb2-std-A-port2 and usb3-std-A-port2
In tegra186-quill-common-p3489-1000-a00.dtsi enable pcie0_lane2_mux by setting the status to “okay”.
In tegra186-quill-power-tree-p3489-1000-a00-00.dtsi under pinctrl@3520000 set vbus-2-supply = <&battery_reg>;
comment out fragment-500-e3325-pcie in tegra186-quill-p3489-1000-a00-plugin-manager.dtsi
Am I missing something for the TX2i configuration? Could someone give me a step by step list of all the changes that need to be made in the device tree to enable configuration 1 on the tx2i?