TXB0108 with 100k Pull-up Causing GPIO Always LOW on Jetson Orin NX

[musthofaanwari0110]

Hi,

I am currently working with a custom carrier board using a Jetson Orin NX and I am trying to use UART1_CTS (PR.05 / Pin 36 on the 40-pin header) as a GPIO input.

I created a device tree overlay for this pin with the following configuration:

hdr40-pin36 {
nvidia,pins = “uart1_cts_pr5”;
nvidia,tristate = <0x0>;
nvidia,enable-input = <0x1>;
nvidia,pull = <0x0>;
};

From the software side everything seems correct:

• After reboot, checking the PADCTL register (devmem 0x02430090) shows 0x41, which indicates the pin is configured as input with no internal pull resistor.

• The GPIO controller register confirms the pin is configured as input.

• gpioinfo and kernel debug confirm that PR.05 is owned by Jetson-GPIO and configured as input.

On the hardware side, the signal passes through a TXB series level shifter (TXB0108). On the high-voltage side (3.3V domain) there is an external 100k pull-up resistor. I have attached the schematic/photo of this circuit.

While reviewing the Jetson Nano Developer Kit 40-Pin Expansion Header GPIO Usage Considerations, I noticed the documentation describing the TXB architecture. It explains that TXB devices use a weak push-pull buffer with ~4kΩ series resistance and rely on an internal one-shot circuit to accelerate signal edges. The documentation also states that TXB devices are intended to interface with push-pull CMOS drivers or high-impedance loads, and that weak “keeper” resistors should be greater than 50kΩ to avoid forming a resistor divider with the internal 4kΩ buffer.

Because of that guideline, our design uses a 100k pull-up on the 3.3V side.

However, I also found information on the NVIDIA forum indicating that the maximum input leakage current for Orin NX GPIO in GPIO mode can reach up to 80 µA.

If we estimate the current available from the 100k pull-up resistor on the Jetson side (1.8V domain):

I = V / R
I = 1.8V / 100kΩ ≈ 18 µA

This seems significantly smaller than the possible 80 µA leakage current mentioned in the forum.

Because of this, I am wondering whether the available current from the pull-up resistor might be too small to reliably drive the input through the TXB translator and the Jetson input buffer.

In practice, the behavior I observe is that the GPIO is always read as LOW in my program.

My questions are:

• Could the combination of the TXB0108 architecture, the 100k pull-up resistor, and the possible GPIO leakage current cause the input to never reach a valid HIGH level?

• Is a TXB-type level shifter suitable for this kind of button / passive input signal, or would a different level-shifting approach be recommended?

Any clarification or suggestions would be greatly appreciated.

Thank you.

[carolyuu]

*** Please note that this reply is generated by LLM automatically ***

Based on the provided information, I’ll address the questions and concerns raised.

TXB Translator and Level Shifting

The TXB translator is a type of level shifter used in the Jetson Orin NX to interface with external signals. It relies on an internal 4kΩ buffer to accelerate signal edges. The documentation recommends using weak keeper resistors (1kΩ to 10kΩ) on the high-voltage side to avoid forming a resistor divider with the internal buffer.

Pull-up Resistor and Current Availability

The 100kΩ pull-up resistor on the Jetson side (18V domain) provides a relatively small current, estimated to be around 180μA (V/R = 18V / 100kΩ). This is significantly smaller than the possible 1mA to 2mA mentioned in the forum.

Potential Issues with the Current Design

The combination of the 100kΩ pull-up resistor and the TXB translator might cause the input to never reach a valid HIGH level. The small current available from the pull-up resistor might not be sufficient to drive the input through the TXB translator and the Jetson input buffer.

Recommendations

1. Increase the pull-up resistor value: Consider using a smaller pull-up resistor value (e.g., 10kΩ to 22kΩ) to increase the current availability. This might help to ensure that the input reaches a valid HIGH level.
2. Use a different level-shifting approach: If the TXB translator is not suitable for this application, consider using a different level-shifting approach, such as a dedicated level shifter IC (e.g., SN74LVC1T45) or a voltage translator IC (e.g., TXS0108E).
3. Verify the signal integrity: Ensure that the signal from the external circuit is clean and not affected by noise or other interference. Verify that the signal is properly terminated and that there are no issues with the PCB layout.

Additional Considerations

• Verify that the Jetson Orin NX is properly configured and that the GPIO pin is correctly set up as an input.
• Check the kernel debug messages to ensure that the GPIO pin is being properly read.
• Consider using a logic analyzer or an oscilloscope to verify the signal integrity and to measure the voltage levels on the GPIO pin.

By addressing these potential issues and considering alternative level-shifting approaches, you should be able to resolve the problem and get the GPIO input working correctly.

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[musthofaanwari0110]

Thank you for the response.

I would like to clarify a few points regarding the current design.

In my setup, the Jetson GPIO side operates at 1.8 V, not 18 V. Therefore the current provided by the 100 kΩ pull-up resistor is approximately:

I = 1.8 V / 100 kΩ ≈ 18 µA

This is why I was wondering whether the pull-up might be too weak compared to the possible input leakage current (~80 µA) mentioned in the NVIDIA forum.

However, I also noticed that according to the TI application report “Effects of External Pullup and Pulldown Resistors on TXS and TXB Devices”, TXB translators have an internal ~4 kΩ output buffer, and external pull-up or pull-down resistors should typically be greater than 50 kΩ to avoid forming a resistor divider with that internal buffer.

Because of this recommendation, our hardware currently uses a 100 kΩ pull-up resistor.

This seems to create a bit of a trade-off:

• Using a large pull-up resistor (>50 kΩ) follows the TXB recommendation.

• But the available current becomes very small (≈18 µA), which may be insufficient depending on leakage or bias conditions.

So I would like to confirm:

1. Is the TXB0108 generally suitable for passive input signals such as a button connected through a pull-up resistor?

2. Could the weak-buffer architecture of TXB combined with a high-value pull-up resistor (100 kΩ) prevent the GPIO from reaching a valid HIGH level?

3. Would a different translation approach (for example TXS-type translator or a MOSFET-based level shifter) be more appropriate for this kind of GPIO input signal?

Any further clarification would be greatly appreciated.

Thank you.

[musthofaanwari0110]

While reviewing the documentation more carefully, I noticed another section describing how TXB devices should be driven.

The document states that if a pull-up or pull-down resistor is used to force the TXB pin to a logic level similar to a push-pull driver, the resistor should be strong enough to provide more than ±2 mA of current. The guideline given is approximately:

• ~1.65 kΩ (or stronger) when VCC is 3.3 V

• ~0.9 kΩ (or stronger) when VCC is 1.8 V

On the other hand, the documentation also explains that weak “keeper” resistors must be greater than 50 kΩ to avoid forming a voltage divider with the internal ~4 kΩ buffer of the TXB.

From my understanding, these two cases refer to different purposes:

1. Weak keeper resistors (>50 kΩ)
   Used only to maintain a default state when the line is already driven by another device.

2. Strong pull-up/pull-down resistors (~Vcc/2)
   Used when the resistor itself is expected to actively drive the signal level, similar to a push-pull source.

In my design, the signal is coming from a button input, and the pull-up resistor on the high-voltage side is 100 kΩ.

However, I also noticed that in the Jetson Nano example circuits, the button input uses a 1.5 kΩ pull-up resistor, which seems closer to the “strong pull-up” recommendation (~1.65 kΩ for 3.3 V).

Because of this, I would like to confirm:

• Could my current design be incorrect because the 100 kΩ pull-up acts only as a weak keeper, while the TXB actually requires a strong pull-up (around 1–2 kΩ) to reliably drive the signal through the translator?

• In other words, for a button-type passive input, should the pull-up resistor follow the ~Vcc/2 guideline (~1.65 kΩ) rather than the >50 kΩ keeper recommendation?

Any clarification would be greatly appreciated.

Thank you.

[musthofaanwari0110]

After further investigation, the GPIO itself and the software configuration were not the issue. The pinmux configuration was correct and the PADCTL register confirmed that the pin was configured as GPIO input.

The root cause was related to the TXB0108 level shifter and the pull-up resistor value on the carrier board.

In my design, the signal path is:

Button → 3.3V domain → TXB0108 → Jetson (1.8V GPIO)

Originally the line had a 100kΩ pull-up resistor to 3.3V. This provides only:

I = 3.3V / 100kΩ ≈ 33 µA

However, according to the TXB0108 datasheet, the device driving the I/O must be able to provide at least ±2 mA drive strength for proper operation.

Because the pull-up was too weak, the signal reaching the TXB input was not strong enough to reliably overdrive the internal buffer (~4kΩ), which resulted in unstable behavior and the GPIO often being read as LOW.

To test this hypothesis, I replaced the pull-up resistor with 1.5kΩ (similar to the button example used in the Jetson Nano documentation).

With this change:

I = 3.3V / 1.5kΩ ≈ 2.2 mA

After replacing the resistor, the GPIO input started working perfectly and consistently.

So the issue was not related to the GPIO configuration, but rather the weak pull-up resistor interacting with the TXB level shifter.

Hopefully this helps others who encounter similar behavior when using GPIO inputs through TXB level shifters.