UART Communication with Jetson Nano and STM32F4

Robotics & Edge Computing Jetson & Embedded Systems Jetson Nano
5

hello alpyildirim97,

it’s register during kernel initial stage, you might see below from dmesg
for example,

nvidia@nvidia-desktop:~$ dmesg | grep UART
[    1.042539] 70006040.serial: ttyTHS1 at MMIO 0x70006040 (irq = 64, base_baud = 0) is a TEGRA_UART
[    1.042933] 70006200.serial: ttyTHS2 at MMIO 0x70006200 (irq = 65, base_baud = 0) is a TEGRA_UART

here’s a similar discussion thread you may also check, Topic 153941 for reference.
thanks