Unable to set PWM to low frequency

WellsX · December 9, 2025, 10:12am

Hi, Nv’s experts:

I encountered some issues during PWM debugging on Jetson thor

Hardware: Custom board

Jetson linux versoin: Jetson_Linux_R38.2.1_aarch64

issue:

When I set the frequency to 500Hz, PWM can work normally and the oscilloscope can display waveforms normally.
When I set the frequency to 200Hz, the PWM seems to have been successfully set, but the oscilloscope cannot display the waveform.

I tried several different frequencies, and it doesn’t work properly below 480Hz.

Can you give some suggessions.

Some debugging information:

root@upai-pro03:/sys/kernel/debug/bpmp/debug/clk/pwm9# cat possible_parents 
pllp_out0 osc 
root@upai-pro03:/sys/kernel/debug/bpmp/debug/clk/pwm9# cat parent 
osc
root@upai-pro03:/sys/kernel/debug/bpmp/debug/clk/pwm9# cat rate 
27000000


root@upai-pro03:/home/nvidia# cd /sys/class/pwm/pwmchip3/
root@upai-pro03:/sys/class/pwm/pwmchip3# echo 0 > export
root@upai-pro03:/sys/class/pwm/pwmchip3# cd pwm0/
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 2000000 > period
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 1000000 > duty_cycle
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 1 > enable
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# busybox devmem 0x810c610000
0x008000D2
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 0 > enable
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 5000000 > period
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 2500000 > duty_cycle
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 1 > enable
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# busybox devmem 0x810c610000
0x0080020E

KevinFFF · December 10, 2025, 2:49am

Hi WellsX,

WellsX:

root@upai-pro03:/sys/kernel/debug/bpmp/debug/clk/pwm9# cat possible_parents 
pllp_out0 osc 
root@upai-pro03:/sys/kernel/debug/bpmp/debug/clk/pwm9# cat parent 
osc
root@upai-pro03:/sys/kernel/debug/bpmp/debug/clk/pwm9# cat rate 
27000000

Could you configure the rate as following to check if it could help?

# echo 10000000 > /sys/kernel/debug/bpmp/debug/clk/pwm9/rate
# cat /sys/kernel/debug/bpmp/debug/clk/pwm9/rate

# echo 0 > export
# cd /sys/class/pwm/pwmchip3/pwm0
# echo 5000000 > period
# echo 2500000 > duty_cycle
# echo 1 > enable

WellsX · December 11, 2025, 10:52am

Hi,

I tried according to your steps, but unfortunately the result is still the same as before. , there is still no waveform on the oscilloscope when the pwm frequency is configured at 200Hz.

At the same time, I further tested that the lowest effective frequency in the current situation is 412Hz.

Log as follows:

root@upai-pro03:/sys/kernel/debug/bpmp/debug/clk/pwm9# cat /sys/kernel/debug/pwm
0: platform/c6a0000.pwm, 1 PWM device
 pwm-0   (pwm-fan             ): requested enabled period: 40000 ns duty: 20549 ns polarity: normal usage_power

1: platform/810c5e0000.pwm, 1 PWM device
 pwm-0   ((null)              ): period: 0 ns duty: 0 ns polarity: normal

2: platform/810c5f0000.pwm, 1 PWM device
 pwm-0   ((null)              ): period: 0 ns duty: 0 ns polarity: normal

3: platform/810c600000.pwm, 1 PWM device
 pwm-0   ((null)              ): period: 1000000 ns duty: 500000 ns polarity: normal

4: platform/810c610000.pwm, 1 PWM device
 pwm-0   ((null)              ): period: 1000000 ns duty: 500000 ns polarity: normal

5: platform/810c620000.pwm, 1 PWM device
 pwm-0   ((null)              ): period: 0 ns duty: 0 ns polarity: normal

6: platform/810c5c0000.tachometer, 1 PWM device
 pwm-0   ((null)              ): period: 0 ns duty: 0 ns polarity: normal
root@upai-pro03:/sys/kernel/debug/bpmp/debug/clk/pwm9# echo 10000000 > ./rate 
root@upai-pro03:/sys/kernel/debug/bpmp/debug/clk/pwm9# cat rate 
10800000
root@upai-pro03:/sys/kernel/debug/bpmp/debug/clk/pwm9# cd /sys/class/pwm/pwmchip4
root@upai-pro03:/sys/class/pwm/pwmchip4# ls
device  export  npwm  power  subsystem  uevent  unexport
root@upai-pro03:/sys/class/pwm/pwmchip4# echo 0 > export
root@upai-pro03:/sys/class/pwm/pwmchip4# ls
device  export  npwm  power  pwm0  subsystem  uevent  unexport
root@upai-pro03:/sys/class/pwm/pwmchip4# cd pwm0/
root@upai-pro03:/sys/class/pwm/pwmchip4/pwm0# echo 5000000 > period
root@upai-pro03:/sys/class/pwm/pwmchip4/pwm0# echo 2500000 > duty_cycle
root@upai-pro03:/sys/class/pwm/pwmchip4/pwm0# echo 1 > enable
root@upai-pro03:/sys/class/pwm/pwmchip4/pwm0# busybox devmem 0x810c610000
0x0080020E

KevinFFF · December 12, 2025, 2:42am

Why it is pwmchip3 from original post but it is pwmchip4 in your latest reply?

May I know what’s the exact PWM interface your are verifying?
Do you want to use 0x810c610000.pwm?
Please share the result of ls -l /sys/class/pwm on your board.

WellsX · December 12, 2025, 6:56am

Hi,

The reason why pwnchip changed from 3 to 4 is because I added a new PWM node(addr:810c600000) in dts. Now i deleted it again, it reverted to pwnchip3. I’m sure that the test steps are correct.

Yes, i want to use 810c610000.pwm, and the result of ls -l /sys/class/pwm is:

nvidia@upai-pro03:~$ ls -l /sys/class/pwm
total 0
lrwxrwxrwx 1 root root 0 Jul  2 14:04 pwmchip0 -> ../../devices/platform/bus@0/c6a0000.pwm/pwm/pwmchip0
lrwxrwxrwx 1 root root 0 Jul  2 14:04 pwmchip1 -> ../../devices/platform/bus@0/810c5e0000.pwm/pwm/pwmchip1
lrwxrwxrwx 1 root root 0 Jul  2 14:04 pwmchip2 -> ../../devices/platform/bus@0/810c5f0000.pwm/pwm/pwmchip2
lrwxrwxrwx 1 root root 0 Jul  2 14:04 pwmchip3 -> ../../devices/platform/bus@0/810c610000.pwm/pwm/pwmchip3
lrwxrwxrwx 1 root root 0 Jul  2 14:04 pwmchip4 -> ../../devices/platform/bus@0/810c620000.pwm/pwm/pwmchip4
lrwxrwxrwx 1 root root 0 Jul  2 14:04 pwmchip5 -> ../../devices/platform/bus@0/810c5c0000.tachometer/pwm/pwmchip5

KevinFFF · December 15, 2025, 7:26am

Okay, can you share the result of rate, parent, possible_parents, period, duty_cycle and enable after you run the following commands for 810c610000.pwm?

KevinFFF:

# echo 10000000 > /sys/kernel/debug/bpmp/debug/clk/pwm9/rate
# cat /sys/kernel/debug/bpmp/debug/clk/pwm9/rate

# echo 0 > export
# cd /sys/class/pwm/pwmchip3/pwm0
# echo 5000000 > period
# echo 2500000 > duty_cycle
# echo 1 > enable

And also measure the signal from scope.

As you can generate 500Hz PWM, could you generate other rate like 400Hz and 300Hz?

WellsX · December 16, 2025, 3:03am

Hi,

Please refer to the test log below:

Set to 200Hz，no waveform output on the scope:

root@upai-pro03:/sys/class/pwm/pwmchip3# ls -l /sys/class/pwm
total 0
lrwxrwxrwx 1 root root 0 Jul  2 14:04 pwmchip0 -> ../../devices/platform/bus@0/c6a0000.pwm/pwm/pwmchip0
lrwxrwxrwx 1 root root 0 Jul  2 14:04 pwmchip1 -> ../../devices/platform/bus@0/810c5e0000.pwm/pwm/pwmchip1
lrwxrwxrwx 1 root root 0 Jul  2 14:04 pwmchip2 -> ../../devices/platform/bus@0/810c5f0000.pwm/pwm/pwmchip2
lrwxrwxrwx 1 root root 0 Jul  2 14:04 pwmchip3 -> ../../devices/platform/bus@0/810c610000.pwm/pwm/pwmchip3
lrwxrwxrwx 1 root root 0 Jul  2 14:04 pwmchip4 -> ../../devices/platform/bus@0/810c620000.pwm/pwm/pwmchip4
lrwxrwxrwx 1 root root 0 Dec 15 10:07 pwmchip5 -> ../../devices/platform/bus@0/810c5c0000.tachometer/pwm/pwmchip5
root@upai-pro03:/sys/class/pwm/pwmchip3# echo 10000000 > /sys/kernel/debug/bpmp/debug/clk/pwm9/rate
root@upai-pro03:/sys/class/pwm/pwmchip3# cat /sys/kernel/debug/bpmp/debug/clk/pwm9/rate
10800000
root@upai-pro03:/sys/class/pwm/pwmchip3# echo 0 > export
root@upai-pro03:/sys/class/pwm/pwmchip3# cd pwm0/
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 5000000 > period
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 2500000 > duty_cycle
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 1 > enable
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# cat /sys/kernel/debug/bpmp/debug/clk/pwm9/rate
10800000
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# cat /sys/kernel/debug/bpmp/debug/clk/pwm9/parent 
osc
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# cat /sys/kernel/debug/bpmp/debug/clk/pwm9/possible_parents 
pllp_out0 osc 
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# ls
capture  duty_cycle  enable  period  polarity  power  uevent
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# cat period 
5000000
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# cat duty_cycle 
2500000
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# cat enable 
1
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 0 > enable 
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 2000000 > period 
bash: echo: write error: Invalid argument
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 2000000 > period 
bash: echo: write error: Invalid argument
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# cd ..
root@upai-pro03:/sys/class/pwm/pwmchip3# ls
device  export  npwm  power  pwm0  subsystem  uevent  unexport
root@upai-pro03:/sys/class/pwm/pwmchip3# echo 0 > unexport 
root@upai-pro03:/sys/class/pwm/pwmchip3# ls
device  export  npwm  power  subsystem  uevent  unexport
root@upai-pro03:/sys/class/pwm/pwmchip3# echo 0 > export 
root@upai-pro03:/sys/class/pwm/pwmchip3# cd pwm0/
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 2000000 > period 
bash: echo: write error: Invalid argument
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 2000000 > period 
bash: echo: write error: Invalid argument

When I set a frequency below 412Hz, the period cannot be set again, i must reboot the target, and retest follow the steps.

Set to 500Hz/412Hz/400Hz, 500Hz and 412Hz have output，400Hz does not have output on the scope:

root@upai-pro03:/sys/class/pwm/pwmchip3# ls -l /sys/class/pwm
total 0
lrwxrwxrwx 1 root root 0 Jul  2 14:04 pwmchip0 -> ../../devices/platform/bus@0/c6a0000.pwm/pwm/pwmchip0
lrwxrwxrwx 1 root root 0 Jul  2 14:04 pwmchip1 -> ../../devices/platform/bus@0/810c5e0000.pwm/pwm/pwmchip1
lrwxrwxrwx 1 root root 0 Jul  2 14:04 pwmchip2 -> ../../devices/platform/bus@0/810c5f0000.pwm/pwm/pwmchip2
lrwxrwxrwx 1 root root 0 Jul  2 14:04 pwmchip3 -> ../../devices/platform/bus@0/810c610000.pwm/pwm/pwmchip3
lrwxrwxrwx 1 root root 0 Jul  2 14:04 pwmchip4 -> ../../devices/platform/bus@0/810c620000.pwm/pwm/pwmchip4
lrwxrwxrwx 1 root root 0 Dec 15 10:11 pwmchip5 -> ../../devices/platform/bus@0/810c5c0000.tachometer/pwm/pwmchip5
root@upai-pro03:/sys/class/pwm/pwmchip3# echo 10000000 > /sys/kernel/debug/bpmp/debug/clk/pwm9/rate
root@upai-pro03:/sys/class/pwm/pwmchip3# cat /sys/kernel/debug/bpmp/debug/clk/pwm9/rate
10800000
root@upai-pro03:/sys/class/pwm/pwmchip3# echo 0 > export
root@upai-pro03:/sys/class/pwm/pwmchip3# cd pwm0/
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 2000000 > period
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 1000000 > duty_cycle
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 1 > enable
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# cat /sys/kernel/debug/bpmp/debug/clk/pwm9/rate
10800000
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# cat /sys/kernel/debug/bpmp/debug/clk/pwm9/parent
osc
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# cat /sys/kernel/debug/bpmp/debug/clk/pwm9/possible_parents 
pllp_out0 osc 
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# cat period 
2000000
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# cat duty_cycle 
1000000
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# cat enable 
1
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 0 > enable 
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 2427184 > period 
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 1213592 > duty_cycle 
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 1 > enable 
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# 
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# 
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 0 > enable 
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 2500000 > period 
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 1250000 > duty_cycle 
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 1 > enable 
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# 
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# 
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 0 > enable 
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 200000 > period 
bash: echo: write error: Invalid argument
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0#

The set frequency does not match the actual measured frequency. I guess it is related to the clock source being changed, because 27000000/10800000=500/200=2.5

KevinFFF · December 16, 2025, 6:58am

What do you mean about the “clock source being changed”?
The following rate has been configured to 10.8MHz?

root@upai-pro03:/sys/class/pwm/pwmchip3# echo 10000000 > /sys/kernel/debug/bpmp/debug/clk/pwm9/rate
root@upai-pro03:/sys/class/pwm/pwmchip3# cat /sys/kernel/debug/bpmp/debug/clk/pwm9/rate
10800000

It seems you are using osc as parent clock.
Have you tried using pllp_out0 instead?

WellsX · December 16, 2025, 7:14am

The previous test actually showed that when the parent clock is reconfigured, the actual output frequency of PWM can also be changed. For example, I changed the parent clock to 600000. and I actually wanted a 10Hz PWM wave, I needed to set the period to 2222222 because 27000000/600000=450/10=45, and the result is that I can obtain a 10Hz waveform on the scope.

In this case, I can obtain the frequency I want, but the actual configuration does not match the obtained one, and manual calculation is required. I want to know how to make the configuration value the same as the obtained value. Additionally, how to automatically configure the parents clock when the system is powered on.

I will try pllp_out0 as parent clock next.

KevinFFF · December 16, 2025, 8:51am

Do you mean that you can get 10Hz waveform?
If so, why you can not get 200Hz?

How did you get 27000000 here?
Is it the default rate(i.e. /sys/kernel/debug/bpmp/debug/clk/pwm9/rate) before you modify it manually?

WellsX · December 16, 2025, 12:04pm

Hi,

Yes, the 27000000 is the default value of /sys/kernel/debug/bpmp/debug/clk/pwm9/rate, and If I use the default 27000000, I cannot obtain a 200Hz waveform. But now I can obtain an output of 200Hz waveform by changing the value of Rate.

Also, I want to know about the two questions mentioned earlier:

How to automatically configure the parents clock when the system is powered on.
How to make the configured frequency consistent with the actual frequency displayed on Scope.

KevinFFF · December 17, 2025, 2:38am

It can be configured through BPMP-DTB which will be loaded during boot up.
Please share the BPMP-DTB used in your case.

I have to check this with internal team.
Please share the commands you run to output 200Hz PWM and also the signal from scope.

WellsX · December 17, 2025, 11:43am

The commands:

root@upai-pro03:/sys/class/pwm/pwmchip3# echo 600000 > /sys/kernel/debug/bpmp/debug/clk/pwm9/rate
root@upai-pro03:/sys/class/pwm/pwmchip3# cat /sys/kernel/debug/bpmp/debug/clk/pwm9/rate
600000
root@upai-pro03:/sys/class/pwm/pwmchip3# echo 0 > export
root@upai-pro03:/sys/class/pwm/pwmchip3# cd pwm0/
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 111112 > period 
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 55556 > duty_cycle 
root@upai-pro03:/sys/class/pwm/pwmchip3/pwm0# echo 1 > enable

WellsX · December 29, 2025, 6:15am

Hi, is there any further good news?

KevinFFF · January 2, 2026, 8:19am

Please also provide bpmp-dtb used in your case.
If you don’t know the exact file, you can simply check the flash log and search for bpfdtbfile.

WellsX · January 4, 2026, 1:42am

The attachment is the BPMP-DTB file.

upai-pro03-bpmp-3834-0008-4071-xxxx.txt (16.8 KB)

KevinFFF · January 22, 2026, 9:06am

Please simply write a custom service and script to configure it during boot up.
e.g.

/etc/systemd/system/setup_pwm9.service:

[Unit]
Description=Setup PWM9 clock at boot
After=multi-user.target

[Service]
Type=oneshot
ExecStart=/usr/local/sbin/setup_pwm9.sh

[Install]
WantedBy=multi-user.target

setup_pwm9.sh:

#!/bin/bash
set -e

echo 600000 > /sys/kernel/debug/bpmp/debug/clk/pwm9/rate

cd /sys/class/pwm/pwmchip3
echo 0 > export
cd pwm0
echo 111112 > period
echo 55556  > duty_cycle
echo 1      > enable

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Unable to set PWM to low frequency

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