AGX Orin Passive VIN power Bad signal Detection

[mvignesh1999be]

Hi Team,

We would like to know Why there is no Passive based Power bad detection Section is not implemented in Agx orin Devkit.

We have this below Section in AGX Xavier, but it is not available for AGX orin. can you please confirm can we proceed or do the design without this passive Detection section?

Thanks

[Trumany]

Hi, please follow the Orin DG and reference design in which the Dv/Dt design is removed.

[mvignesh1999be]

Hi @Trumany ,

Thanks for your response. May i know about the reason?

Hope we shall proceed without dv/dt and above mentioned section. It will not be an any issue. Please confirm this

[Trumany]

As no need to add that design to provide more discharge time for Orin.

[mvignesh1999be]

Hi @Trumany

did you mean it will be handled by Orin AGX SOM itself (internal PMIC and its related section?)

We would like to know the actual reason for removing this section. because we don’t see any input voltage related changes between Xavier and ORIN.

Thanks

[Trumany]

Yes as said, no need for Orin. Please just follow the Orin Design Guide to make custom design for Orin, not based on Xavier guide.

[mvignesh1999be]

Hi @Trumany,

Thanks for your response and your support

[mugunthan.s]

Hi @Trumany ,

If the power bad detection (dv/dt) is handled by AGX Orin ,
Then what happens if the VIN_PWR_BAD_N signal level goes to intermediate state like 2.4 or 2.8V ?
What is the minimum timing requirement for the VIN_PWR_BAD_N has to be low for the SOM to detect PWR_BAD and deassert carrier_pwr_on ?

[Trumany]

Please refer to below design in P3737_A05 schematic.