VDDIN_PWR_BAD_N Use Case

Hi,

I’m working on a carrier board design for the AGX Orin Industrial module and am trying to figure out the base requirements for the power signals. In the design guide, VDDIN_PWR_BAD_N is described as

“VDD_IN Power Bad: Carrier board indication to module that
VDD_IN power is not valid. Carrier board should stop
asserting this signal and allow on-module pull-up to bring
high only when HV/MV are stable and have have reached
required voltage levels.”

My reading of this is that it should be deasserted when SYS_VIN_MV and SYS_VIN_HV are stable however the dev kit seems to treat this as a watch signal for the jack input voltage, not the voltage to the actual module. (it does not have any logic at all related to SYS_VIN_MV for example). which interpretation is correct? if the first, what is the explanation for the dev kit design?

Thanks!

Teva

Below design can guarantee it is deasserted after MV and HV are stable.