Custom MIPI Camera:- Gstremaer error: streaming stopped, reason not-negotiated (-4)

Autonomous Machines Jetson & Embedded Systems Jetson TX2
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34

hello jetuser,

for disable CRC checking.
could you please try below code snippet instead.
for example,

diff --git a/drivers/media/platform/tegra/camera/csi/csi4_fops.c b/drivers/media/platform/tegra/camera/csi/csi4_fops.c
index 1647ff467..7efd04436 100644
--- a/drivers/media/platform/tegra/camera/csi/csi4_fops.c
+++ b/drivers/media/platform/tegra/camera/csi/csi4_fops.c
@@ -89,8 +89,16 @@ static void csi4_stream_init(struct tegra_csi_channel *chan, int csi_port)
        csi4_stream_write(chan, csi_port, INTR_STATUS, 0x3ffff);
        csi4_stream_write(chan, csi_port, ERR_INTR_STATUS, 0x7ffff);
        csi4_stream_write(chan, csi_port, ERROR_STATUS2VI_MASK, 0x0);
-       csi4_stream_write(chan, csi_port, INTR_MASK, 0x0);
-       csi4_stream_write(chan, csi_port, ERR_INTR_MASK, 0x0);
+
+        csi4_stream_write(chan, csi_port, INTR_MASK, PH_ECC_MULTI_BIT_ERR |
+                        PD_CRC_ERR_VC0 | PH_ECC_SINGLE_BIT_ERR_VC0);
+        csi4_stream_write(chan, csi_port, ERR_INTR_MASK, PH_ECC_MULTI_BIT_ERR |
+                        PD_CRC_ERR_VC0 | PH_ECC_SINGLE_BIT_ERR_VC0);
+        csi4_stream_write(chan, csi_port, ERROR_STATUS2VI_MASK,
+                        CFG_ERR_STATUS2VI_MASK_VC0 |
+                        CFG_ERR_STATUS2VI_MASK_VC1 |
+                        CFG_ERR_STATUS2VI_MASK_VC2 |
+                        CFG_ERR_STATUS2VI_MASK_VC3);
 }

cil_settletime=0 means auto-calibrate.
you may still able to configure the settle time determine how many cscil clock cycles to wait after LP00 to tune the transition time from LP to HS mode.
i.e. the sequence is… LP11->LP01->LP00->LP11.