Differential pair length


How to get the length of “Differential pair length matching” from PCIE layout guide? What’s the +/- tolerance mils?

Plus, what’s “Differential pair uncoupled length?”

Thank you,

You can get the length by converting from time as the words you marked in yellow. No +/- tolerance for it. You should write the value into the EDA tool as constraint rule.

Hi Trumany,

Thank you for your prompt support.

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