Hello,
This query is common for Jetson Nano , TX2 NX and Xavier NX.
As in all the above SoMs two display ports are given its DP and HDMI
First port is always DP but second port can be used as DP as well as HDMI.
Most cases second port work as HDMI.
I want to enable second port as DP1.
Please guide me on this.
Hi,
Generally the device tree itself is already the answer to your question.
The reason why NV devkit is always to be one HDMI and another DP is because it is like a demo for enabling different kinds of display.
Default setting is
sor0 → tegradc.1 → configured as DP mode
sor1 → tegradc.0 → configured as HDMI mode.
If you swapped the hardware, then you just need to configure the corresponding sor node and tegradc node.
Also, must configure the pinmux for the HPD pin. DP needs to be configured in SFIO and HDMI needs to be as GPIO.
Hello,
Thanks a lot for reply.
I was going through some old topics related to DP1 enabling.
As per your suggestion I searched for sor nodes I found out those in
tegra210-porg-p3448-common.dtsi
I made following corrections in those two nodes,
Also I checked DP1_HPD pins (pin 96) configuration.
In pinmux table its by default consider as HPD

These pinmux dtsi’s I include in my device tree.
Compile DTB and flash the SoM.
but after flashing I get only DP0 port working.
I though I should get DP0 and DP1 ports.
Did I missed something?
Please guide me on this.
Thanks for support.
Hello,
Thanks a lot for quick reply.
I will check my final dtb file and I will also try to share.
But apart from this
tegra210-porg-p3448-common.dtsi
Is there any other dtsi where sor / sor1 nodes are need to be changed?
When we use DP1 port as a HDMI display out port this DP1_HPD (pin 96) is already working there as hot plug detection pin. In that case it work properly so even if we change role of port from HDMI to DP but still it that pin is for detection only.
Please guide me on this.
Thanks a lot for support.
Just want to clarify. I never do any “memorization” for the device tree location.
It is not needed when it comes to TX1/TX2/Xavier/Orin/Thor. You won’t memorize everything there for so many kind of chips and platforms.
The key items here is just you need to trace the code. Check why something in your final dtb does not meet your expectation. And check dmesg if it has any error.
Yes, that is expected. So I guess you just has wrong pinmux setting only as I mentioned. gpio-input override your SFIO setting to GPIO so you never see it work.
Hello,
Thanks a lot for reply.
I will go through the details and try to do necessary device tree changes.
Also I want to guidance on one more things.
Please check below diagram,
This is DP guideline given for eDP and DP ports for SoM.
But for Orin case there is DP++ connections are shown as follows.
Even Orin Nano devkit also refer above DP++ design guide line.
Is it necessary to use AUX voltage converter IC PI3AUX221ZTAEX?
Please guide me on this.
This sounds not related to original problem at all. Please file a new topic on Orin forum.
Also, just want to clarify. If you want to do a carrier board that covers every SOM since Jetson Nano/TX2… to Orin, then it might not be possible.
Hello,
Thanks a lot for reply.
OK will continue this case for DP1 device tree changes only.
For hardware clarification I will start new topic.
Thanks.