GTE timestamping issues with LIC IRQs

Hello.

I’m trying to set up the GTE to timestamp interrupts generated by GPIO pins. I have a driver that sets up and interrupt for three GPIO pins and I’m trying to get timestamps for each of the IRQs. The pins in question are GPIO3_PH.03, GPIO_PH.05 and GPIO3_PH.06. The interrupts are firing correctly and the ISR in the driver is being run without issues.

I’m struggling to understand how the GPIO IRQs are mapped to LIC IRQs. From the technical reference manual I understood port H is mapped to GPIO_CTL_4, and indeed registering the GTE event for number 320 (GPIO4_0) provides timestamps. However that is the only interrupt number that is providing events, and I don’t have events from the other two GPIOs.

From what I understood from the reference manual, LIC IRQs should go to the CCPLEX unaggregated, so I should be able to timestamp each interrupt separately, right? I have tried every LIC IRQ GPIO numbers and there’s no events from any other than 320.

I am aware that the GPIOs in the AON GPIO controller would work, but I’m curious whether what I’m trying to do is possible or not, because what I understood from the manuals is that is should be.

Best regards,
Antti

Hi antti.keranen,

Are you using the devkit or custom board?

For GPIO mapping, you could just use the following command to know current GPIO status.

sudo cat /sys/kernel/debug/gpio

Hi.
Thanks for the reply, but it does not answer the question I presented. I know how to map GPIOs, and I know the GPIO pins are working as expected.

What I’m asking is how to map GPIO interrupts to LIC (Legacy Interrupt Controller) interrupts so that I could use them with the GTE (Global Timestamping Engine).

The documentation in MB1 Platform Configuration — Jetson Linux<br/>Developer Guide 34.1 documentation looks promising, but I haven’t had success modifying that configuration either. Do I need to touch SCR registers as well? There seems to be no information about them online.

For GPIO interrupt mapping of Xavier AGX, you could just refer to Linux_for_Tegra/bootloader/t186ref/BCT/tegra194-mb1-bct-gpioint-p2888-0000-p2822-0000.cfg.

Thanks for the reply, I had misconfigured the GPIO interrupt map, which is why it had no effect.

I have a followup question:
I tried using INT1, INT2 and INT3 and it had the effect that I could not get GPIO interrupts anymore for any of those pins. Also there were no GTE events for any of the pins.

Then I tried to change the configuration to use INT0, INT1, INT2. In this configuration, both the interrupts and the GTE events are working for all of the pins as expected. Is there something special about INT0 that it needs to be used?

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