How to configure SPI2 to enable it?

Has anyone already used SPI2(spi@3230000) on TX2 ? ( in L4T 28.1 or 28.2 or later…)

I mean the SPI Interfrace below(from pinmux map):

<b>  SOM Connector       IC Ball Name         SFIO2</b>
SPI2_CLK	H14	GPIO_WAN5          SPI1_CLK
SPI2_CS0#	G16	GPIO_WAN8          SPI1_CS0

I have already tried the instructions for activating SPI like: and many other here …

SPI(/dev/spidev3.0 -> spi@3240000) works fine, but if I do the same for SPI2 (/dev/spidev2.0 -> spi@3230000) and running the spidev_test I do not see any signals on the pins (CLK(H14), MOSI(G15), CS0(G16)) on the oscilloscope.
Does SPI2 have to be activated in a different way than SPI1?

Can someone help?

For the driver of view it’s SPI0 aka spi@3210000
The SPI1 is HW function define and decrease 1 for software define due to driver assign the number start from 0.

Do I understand it right? I have to use SPI0 (/dev/spidev0.0 aka spi@3210000) so I can use SPI over the pins (H14 / H15 …)?

Yes, these pin if map to SPI0 /dev/spidev0.x

Thank you.

But I still have no signals on outputs (MOSI(G15), CLK(H14), CS0#(G16)) if i start spidev_test on /dev/spidev0.0

But if i start spidev_test on /dev/spidev0.1 the SPI2_CS1#(F16) goes HIGH. The rest of pins stay always LOW.

Something seems to be still wrong in my configuration.

My settings looks like below:


Bank: 0 Reg: 0x0243d000 Val: 0x00000409 -> gpio_wan8_ph3 (i have set it manualy)
Bank: 0 Reg: 0x0243d008 Val: 0x00000401 -> gpio_wan7_ph2 (i have set it manualy)
Bank: 0 Reg: 0x0243d010 Val: 0x00000455 -> gpio_wan6_ph1 (i have set it manualy)
Bank: 0 Reg: 0x0243d018 Val: 0x00000401 -> gpio_wan5_ph0 (i have set it manualy)
Bank: 0 Reg: 0x0243d078 Val: 0x00000409 -> gpio_mdm4_py3 (was set per default)

and the dts:

spi@3210000 {
                reg = <0x0 0x3210000 0x0 0x10000>;
                dmas = <0x19 0xf 0x19 0xf>;
                interrupts = <0x0 0x24 0x4>;
                compatible = "nvidia,tegra186-spi";
                clock-names = "spi", "pll_p", "clk_m";
                reset-names = "spi";
                clocks = <0xd 0x31 0xd 0x10d 0xd 0x261>;
                nvidia,dma-request-selector = <0x19 0xf>;
                resets = <0xd 0x28>;
                status = "okay";
                #address-cells = <0x1>;
                phandle = <0x78>;
                nvidia,clk-parents = "pll_p", "clk_m";
                #stream-id-cells = <0x1>;
                #size-cells = <0x0>;
                dma-names = "rx", "tx";
                linux,phandle = <0x78>;
            spidev@0 {
                        reg = <0x0>;
                        compatible = "spidev";
                        spi-max-frequency = <0x1312D00>;
                        nvidia,cs-setup-clk-count = <0x1e>;
                        nvidia,cs-hold-clk-count = <0x1e>;
                        nvidia,rx-clk-tap-delay = <0x1f>;
                        nvidia,tx-clk-tap-delay = <0x0>;

                spidev@1 {
                        reg = <0x1>;
                        compatible = "spidev";
                        spi-max-frequency = <0x1312D00>;

Any idea, what can i try else?

Could you read those pin REG by devmem2 to confirm?

here the log from devmem2:

nvidia@tegra-ubuntu:~$ sudo devmem2 0x0243d000 w
/dev/mem opened.
Memory mapped at address 0x7fa636b000.
Value at address 0x243D000 (0x7fa636b000): 0x409

nvidia@tegra-ubuntu:~$ sudo devmem2 0x0243d008 w
/dev/mem opened.
Memory mapped at address 0x7fa8ba7000.
Value at address 0x243D008 (0x7fa8ba7008): 0x401

nvidia@tegra-ubuntu:~$ sudo devmem2 0x0243d010 w
/dev/mem opened.
Memory mapped at address 0x7f8ee14000.
Value at address 0x243D010 (0x7f8ee14010): 0x455

nvidia@tegra-ubuntu:~$ sudo devmem2 0x0243d018 w
/dev/mem opened.
Memory mapped at address 0x7f96b93000.
Value at address 0x243D018 (0x7f96b93018): 0x401

nvidia@tegra-ubuntu:~$ sudo devmem2 0x0243d078 w
/dev/mem opened.
Memory mapped at address 0x7f9d471000.
Value at address 0x243D078 (0x7f9d471078): 0x409

It looks ok for me…

Hi mrseg,
Is this issue resolved?
Does SPI1 (/dev/spidev0.0) works for you?

no, this issue is still not resolved.

And I just have no other ideas, what else I could check…