How to enable I2C6 (DPAUX)

Robotics & Edge Computing Jetson & Embedded Systems Jetson TK1
1

Hi All,
I’m trying to enable I2C6, but when i try to md 0x7000D100 (I2C base @) from u-boot it hangs !!!
From the linux CLI, i get the following messages, and no activity is visible on the I2C6
root@tegra-ubuntu:/home/ubuntu# i2cdetect 5
WARNING! This program can confuse your I2C bus, cause data loss and worse!
I will probe file /dev/i2c-5.
I will probe address range 0x03-0x77.
Continue? [Y/n]
0 1 2 3 4 5 6 7 8 9 a b c d e f
00: – – – – – – – – – – – – –
10: – – – – – – – – – – – – – – – –
20: – – – – – – – – – – – – – – – –
30: [ 539.530227] tegra-i2c tegra12-i2c.5: — register dump for debugging ----
[ 539.546743] tegra-i2c tegra12-i2c.5: I2C_CNFG - 0x2c00
[ 539.560795] tegra-i2c tegra12-i2c.5: I2C_PACKET_TRANSFER_STATUS - 0xff0001
[ 539.568033] tegra-i2c tegra12-i2c.5: I2C_FIFO_CONTROL - 0xe0
[ 539.574048] tegra-i2c tegra12-i2c.5: I2C_FIFO_STATUS - 0x800080
[ 539.580224] tegra-i2c tegra12-i2c.5: I2C_INT_MASK - 0xed
[ 539.586166] tegra-i2c tegra12-i2c.5: I2C_INT_STATUS - 0x2
[ 539.591737] tegra-i2c tegra12-i2c.5: msg->len - 1
[ 539.596662] tegra-i2c tegra12-i2c.5: is_msg_write - 0
[ 539.601900] tegra-i2c tegra12-i2c.5: buf_remaining - 1
[ 539.607389] tegra-i2c tegra12-i2c.5: i2c transfer timed out, addr 0x0030, data 0x00
– [ 540.615936] tegra-i2c tegra12-i2c.5: — register dump for debugging ----
[ 540.630031] tegra-i2c tegra12-i2c.5: I2C_CNFG - 0x2c00
[ 540.638920] tegra-i2c tegra12-i2c.5: I2C_PACKET_TRANSFER_STATUS - 0xff0001
[ 540.646740] tegra-i2c tegra12-i2c.5: I2C_FIFO_CONTROL - 0xe0
[ 540.652911] tegra-i2c tegra12-i2c.5: I2C_FIFO_STATUS - 0x800080
[ 540.659257] tegra-i2c tegra12-i2c.5: I2C_INT_MASK - 0xed
[ 540.664737] tegra-i2c tegra12-i2c.5: I2C_INT_STATUS - 0x2
[ 540.670368] tegra-i2c tegra12-i2c.5: msg->len - 1
[ 540.675219] tegra-i2c tegra12-i2c.5: is_msg_write - 0
[ 540.680664] tegra-i2c tegra12-i2c.5: buf_remaining - 1
[ 540.686154] tegra-i2c tegra12-i2c.5: i2c transfer timed out, addr 0x0031, data 0x00
– ^C[ 541.694244] tegra-i2c tegra12-i2c.5: — register dump for debugging ----
[ 541.708602] tegra-i2c tegra12-i2c.5: I2C_CNFG - 0x2c00
[ 541.724548] tegra-i2c tegra12-i2c.5: I2C_PACKET_TRANSFER_STATUS - 0xff0001
[ 541.731804] tegra-i2c tegra12-i2c.5: I2C_FIFO_CONTROL - 0xe0
[ 541.737817] tegra-i2c tegra12-i2c.5: I2C_FIFO_STATUS - 0x800080
[ 541.744134] tegra-i2c tegra12-i2c.5: I2C_INT_MASK - 0xed
[ 541.750017] tegra-i2c tegra12-i2c.5: I2C_INT_STATUS - 0x2
[ 541.755925] tegra-i2c tegra12-i2c.5: msg->len - 1
[ 541.760877] tegra-i2c tegra12-i2c.5: is_msg_write - 0
[ 541.766119] tegra-i2c tegra12-i2c.5: buf_remaining - 1
[ 541.771610] tegra-i2c tegra12-i2c.5: i2c transfer timed out, addr 0x0032, data 0x00

When i try to dump the memory at 0x545c0000 (DPAUX) it doesn’t match the reset values.
i get:

md 0x545c00c8 1

545c00c8: 60091012 … Tegra124 (Fireball TK1) # md 0x545c0000 0x40 545c0000: 60091012 60091012 60091012 60091012 ...…...… 545c0010: 60091012 60091012 60091012 60091012 ...…...… 545c0020: 60091012 60091012 60091012 60091012 ...…...… 545c0030: 60091012 60091012 60091012 60091012 ...…...… 545c0040: 60091012 60091012 60091012 60091012 ...…...… 545c0050: 60091012 60091012 60091012 60091012 ...…...… 545c0060: 60091012 60091012 60091012 60091012 ...…...… 545c0070: 60091012 60091012 60091012 60091012 ...…...… 545c0080: 60091012 60091012 60091012 60091012 ...…...… 545c0090: 60091012 60091012 60091012 60091012 ...…...… 545c00a0: 60091012 60091012 60091012 60091012 ...…...… 545c00b0: 60091012 60091012 60091012 60091012 ...…...… 545c00c0: 60091012 60091012 60091012 60091012 ...…...… 545c00d0: 60091012 60091012 60091012 60091012 ...…...… 545c00e0: 60091012 60091012 60091012 60091012 ...…...… 545c00f0: 60091012 60091012 60091012 60091012 ...…...…`
I’m wondering if i can R/W to the DPAUX memory space without specific initialization.
Any info will be very appreciated.
Greg

2

I can verify 0x7000d100 md locks from u-boot md read of a single word on R21.4. I don’t know enough about i2c to know why. Normal operation does require a number of details be set, e.g., clock rates, so perhaps one of the prerequisites has not been met (for read-only, this seems unlikely, it’s all I can think of).

3

Why are you trying to memory dump the I2C register in u-boot?

To test I2C in u-boot :
i2d dev 5
i2c probe

To enable I2C6 in L4T - change the DTS file. Look for the definition of i2c5 and add something like this :
i2c6: i2c@7000d100 {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = “nvidia,tegra124-i2c”;
reg = <0x0 0x7000d100 0x0 0x100>;
interrupts = <0x0 0x3f 0x4>;
nvidia,memory-clients = <0xe>;
status = “okay”;
clock-frequency = <0x61a80>;
};

If you have a supported (eg EEPROM) I2C device type, this can be added to the I2C definition as well.

4

Hi,
Thanks for your feedback.
I doesn’t work on my side.
The DPAUX_HYBRID_PADCTL_0 register is never initialized in the u-boot or kernel source code.
In the TRM, the reset value of the DPAUX_HYBRID_PADCTL_0 register is 0x00002462.
Bit0:=0 => AUX mode by default
Greg

5

I2C6 is associated with the Display Port. To use I2C6 on its own, you may have to disable DP support and rebuild the kernel and then enable I2C6 in the DTB.

If you are trying to use the DP - search the forum, I believe some people have reported it works.

6

Hi GE_chen,
Even if i disable DP in the kernel, the I2C6 doesn’t work.
According to me it is normal as reset bit0 value in the DPAUX_HYBRID_PADCTL_0 register is 0 (AUX mode).
Greg

7

OK, lets go back to basics

U-Boot is a better option to test I2C, no device drivers in the way and have I2C diagnostic functions.

In u-boot do commands :
i2c dev 5
i2c probe

The second command should cause I2C activity which you should be able to see (on a scope).

If there is nothing attached on I2C6 and in valid address range, the nothing will be listed.
If I2C device is attached on I2C6 and it is in the valid address range, u-boot should report which addresses responded.

What have you got attached to I2C6 ?

8

Hi GE_chen,
Thanks for your feedback
I2C6 is not enabled in u-boot.
#define TEGRA_I2C_NUM_CONTROLLERS 5
It means i2c dev ranges from 0 to 4
So you cannot run i2c dev 5
Is it really possible to use I2C6 ?
At powerup the DP_AUX_CH0_P/DP_AUX_CH0_N (resp SCL/SDA) are initialized for DP.
Any feedback will be VERY appreciated …
Greg

9

Hi Greg

#define TEGRA_I2C_NUM_CONTROLLERS 5
Well spotted.
The define is in tegra114-common.h
Try changing it to 6.

The u-boot dts is in
u-boot/arch/arm/dts/tegra124-jetson-tk1.dtb
It looks like all the i2c controllers are there and enabled, so no change needed there.

“Is it really possible to use I2C6 ?”
I do not know, I am assuming you can. Hence first trying to verify in u-boot.

To disable DP (display port)in
kernel/arch/arm/configs/tegra12_defconfig
find
CONFIG_TEGRA_DP=y
change to

CONFIG_TEGRA_DP is not set

rebuild the defconfig and zImage
What happens to I2C5 (actual I2C6) - do not know, probably still need to enable it in the devicetree.
Add this to your device tree in L4T :
i2c6: i2c@7000d100 {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = “nvidia,tegra124-i2c”;
reg = <0x0 0x7000d100 0x0 0x100>;
interrupts = <0x0 0x3f 0x4>;
nvidia,memory-clients = <0xe>;
status = “okay”;
clock-frequency = <0x61a80>;
};

What device are you trying to use on I2C6 ?
Is there a driver already in Linux for it?