Hi NV,
As my topic, I would like to enable I2C-8(i2c@810c690000 ) at my custom board with JP7.2.
Below are the modifications I made:
I ref [ Jetson/L4T/peripheral/ - eLinux.org]
pinmuxtegra264-mb1-bct-pinmux-p3834-xxxx-p4071-0000.dtsi:
dp_aux_ch3_p {
nvidia,pins = "dp_aux_ch3_p";
nvidia,function = "i2c8_clk";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,drv-type = <TEGRA_PIN_1X_DRIVER>;
nvidia,e-io-od = <TEGRA_PIN_DISABLE>;
nvidia,e-lpbk = <TEGRA_PIN_DISABLE>;
};
dp_aux_ch3_n {
nvidia,pins = "dp_aux_ch3_n";
nvidia,function = "i2c8_dat";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,drv-type = <TEGRA_PIN_1X_DRIVER>;
nvidia,e-io-od = <TEGRA_PIN_DISABLE>;
nvidia,e-lpbk = <TEGRA_PIN_DISABLE>;
};
After flash the image, I use sudo i2cdetect -y -r 8 to test, but nothing detect.
Is there any other configuration that I may have missed modifying?
At source/hardware/nvidia/t264/nv-public/tegra264.dtsi
I was wondering if this might be related to the DMA configuration.
i2c8: i2c@810c690000 {
compatible = "nvidia,tegra264-i2c";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x81 0x0c690000 0x0 0x10000>;
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <400000>;
clocks = <&bpmp TEGRA264_CLK_TOP_I2C>,
<&bpmp TEGRA264_CLK_PLLP_OUT0>;
clock-names = "div-clk", "parent";
assigned-clocks = <&bpmp TEGRA264_CLK_TOP_I2C>;
assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
resets = <&bpmp TEGRA264_RESET_I2C8>;
reset-names = "i2c";
nvidia,epl-reporter-id = <0x8057>;
};
The other pins that I configured as I2C are working normally.
i2c9: i2c@810c6a0000 {
compatible = "nvidia,tegra264-i2c";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x81 0x0c6a0000 0x0 0x10000>;
interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <400000>;
dmas = <&gpcdma 2 2 TEGRA264_GPCDMA_SID_I2C9>;
dma-names = "tx";
iommus = <&smmu1_mmu TEGRA264_GPCDMA_SID_I2C9>;
dma-coherent;
clocks = <&bpmp TEGRA264_CLK_TOP_I2C>,
<&bpmp TEGRA264_CLK_PLLP_OUT0>;
clock-names = "div-clk", "parent";
assigned-clocks = <&bpmp TEGRA264_CLK_TOP_I2C>;
assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
resets = <&bpmp TEGRA264_RESET_I2C9>;
reset-names = "i2c";
nvidia,epl-reporter-id = <0x8058>;
};
Thanks!!


