how to use PCIE c4 and c2 root port?

I designed a carrier board using PCIE C4 and C2 root ports. But the Jetson_AGX_Xavier_OEM_Product_Design_Guide said these pins(E18, E19, K10, J11, E22, E23, J9, G8) are RSVD pins.
How can I use the C4 and C2 root ports of PCIE?

Hi, they are not used on dev kit, you can use them by design a custom board following OEM DG.

I have made a mistake.E22,E23,J9,G8 are not RSVD pins.
In the P2822_B03 reference desgin file.E18,E19 are the clock pins,the K10 is the RESET pin,the J11 is the CLKREQ pin,they are all function for the PCIE C2 controller.
In the “nv_Jetson_AGX_Xavier_Series_OEM_Product_Design_Guide.pdf” these pins(E18,E19,K10,J11) are RSVD pins.
I want to use the PCIE C2 act as a root controler.I can use a clock buff(si52202) to generate the clock for PCIE C2,but i am not sure if I can use GPIO as a reset signal for PCIE C2.
Please give me some suggustions.