Is there a patch for nve32_t xlgpcs_init in nvethernetrm/osi/core/xpcs.c?

Robotics & Edge Computing Jetson Systems Jetson Thor
1

Is there a patch for nve32_t xlgpcs_init in nvethernetrm/osi/core/xpcs.c? If so can I get the patch?

/**
 * @brief xlgpcs_init - XLGPCS initialization
 *
 * Algorithm: This routine initialize XLGPCS in USXMII mode.
 *
 * @param[in] osi_core: OSI core data structure.
 *
 * @retval 0 on success
 * @retval -1 on failure.
 */
nve32_t xlgpcs_init(struct osi_core_priv_data *osi_core)
{
#if 0 //FIXME: matching with HW script sequence for 25G
        nveu32_t retry = 1000;
        nveu32_t count;
        nve32_t cond = COND_NOT_MET;
#endif
        nve32_t ret = 0;
        nveu32_t value = 0;
3

Not sure what is the question here. Please elaborate.

4

Hi WayneWWW,

The xlgpcs_init() function in the file Linux_for_Tegra/source/nvethernetrm/osi/core/xpcs.c

has a notation “//FIXME: matching with HW script sequence for 25G”.

That looks like it would be beneficial for 25G networking on Thor.

Has Nvidia addressed this issue yet in the source code?

/**
 * @brief xlgpcs_init - XLGPCS initialization
 *
 * Algorithm: This routine initialize XLGPCS in USXMII mode.
 *
 * @param[in] osi_core: OSI core data structure.
 *
 * @retval 0 on success
 * @retval -1 on failure.
 */
nve32_t xlgpcs_init(struct osi_core_priv_data *osi_core)
{
#if 0 //FIXME: matching with HW script sequence for 25G
	nveu32_t retry = 1000;
	nveu32_t count;
	nve32_t cond = COND_NOT_MET;
#endif
	nve32_t ret = 0;
	nveu32_t value = 0;

	if (osi_core->xpcs_base == OSI_NULL) {
		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
			     "XLGPCS base is NULL", 0ULL);
		ret = -1;
		goto fail;
	}

	if (osi_core->pre_sil == 0x1U) {
		OSI_CORE_ERR(osi_core->osd, OSI_LOG_ARG_HW_FAIL,
			     "Pre-silicon, skipping lane bring up", 0ULL);
	} else {
		/* Select XLGPCS in wrapper register */
		if ((osi_core->mac == OSI_MAC_HW_MGBE_T26X) &&
		    (osi_core->uphy_gbe_mode == OSI_GBE_MODE_25G)) {

			/* Added below programming sequence from hw scripts */
			value = osi_readla(osi_core, (nveu8_t *)osi_core->xpcs_base +
					   T26X_XPCS_WRAP_CONFIG_0);
			value |= OSI_BIT(0);
			osi_writela(osi_core, value, (nveu8_t *)osi_core->xpcs_base +
				    T26X_XPCS_WRAP_CONFIG_0);
...
5

No, this issue is not fixed.