Hi Guys, I’m wondering if it is possible to manually control the hardware SPI Chip Select pin instead of them being controlled by the hardware? I wish to use the SPI peripheral in Master mode and manually control the Chip Select level. More specifically I’m interested in controlling SPI2_CS0# whi…

All of the dt setting can find here. …/kernel/kernel-4.9/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt …/kernel/kernel-4.9/Documentation/devicetree/bindings/spi/nvidia,tegra124-spi.txt

Why need manual control? The chip select will be assert/deassert automatic when access the SPI device.

Hi @ShaneCCC The device I’m talking to is made so that I need to keep CS asserted (low) between the transfers. The “problem” is that I first have to send say 20 bytes and then depending on the response on MISO while sending these I have to send another 20 bytes which are depending on the result of…

After consult with developer Jetson doesn’t support to control CS externally. We can use sw cs mode but only driver has control over it.

Hi @ShaneCCC Thanks for checking! Can you tell me (or point me to) how one can use sw cs mode using the before mentioned driver? Regards Lasse

You can check the source of …/kernel/nvidia/drivers/spi/spi-tegra114.c

Could it be cs_change that we need? The doc says: (ii) When the transfer is the last one in the message, the chip may * stay selected until the next transfer. On multi-device SPI busses * with nothing blocking messages going to other devices, this is just * a performance hint; starting a message t…

[image] LasseRoedtnes: I’m wondering if it is possible to manually control the hardware SPI Chip Select pin instead of them being controlled by the hardware? I wish to use the SPI peripheral in Master mode and manually control the Chip Select level. More specifically I’m interested in controll…

Manual control of dedicated SPI CS?

Robotics & Edge Computing Jetson Systems Jetson TX2

LasseRoedtnes June 1, 2020, 8:46pm 10

@ShaneCCC

Can you give any guidance?

Yt
Lasse

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Manual control of dedicated SPI CS?

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