Marvell 88E6231 switch configuration

Hi,

We encountered a small problem with the Marvell switch which we did not observe for prior sdk releases (before 4.1.6.1).

It appears that the default vlan port setup for the switch blocks broadcasts between RJ45 jack on the drivepx2 and the one on the cable harness.

The switch connections and default masks in aurix for the autochauffeur are:

port : descr. : mask

0 : tegraa : 0x7e
1 : tegrab : 0x7d
2 : broadr : 0x7b
3 : cable harness : 0x3
4 : jack : 0x3
5 : aurix : 0x7

Given the default masks, I guess that each port is represented by its bit position in the mask and that the settings for the first three ports allow communications with all other ports except themselves and that the latter three are limited (e.g. jack and cable harness can only broadcast to tegraa and tegrab).

Is this correct? I could not find details about this in the documentation, maybe I missed it.

Changing port mask for 3 and 4 according to this scheme to allow communication between harness and jack solves our problem.

Kind regards,

Jan Willem van den Brand

Hello JW2000,

Could you please see “https://docs.nvidia.com/drive/nvvib_docs/index.html#page/NVIDIA%20Vibrante%20Linux%20DPX%20Development%20Guide%2FAppendix%2FTimeSynchronization_DPX2.html”?

Hi SteveNV,

Thank you for your reply.

That page says nothing about how to configure the port-based vlan of the Marvell switch via the Aurix. It does mention a datasheet but it says TBD.

Kind regards,

Jan Willem van den Brand

Hell JW2000,

Could you please refer to the EB-DrivePX_Software_User_Guide_DPX2.pdf file for your question?
The doc is in /VibranteSDK/vibrante-t186ref-foundation/utils/scripts/DPX2-P2379-EB-V2.01.03_release.zip in Beta2.0. Thanks.