Mipi-dsi lcd for jetson tx2

Robotics & Edge Computing Jetson & Embedded Systems Jetson TX2
1

ILI9881D+HSD5.0_720x1280_3LINE.txt (10.2 KB)
boot_log.txt (67.3 KB)

The lcd power is supplied to mipi-dsi lcd
The lcd backlight is on
It seems that dsi-init-cmd does not work.
I must to send data in ILI9881D+HSD5.0_720x1280_3LINE.txt
I modified as below but mipi-dsi lcd not display.
Is there a problem with the dsi-init-cmd below?

nvidia,dsi-init-cmd = 
                    <TEGRA_DSI_DELAY_MS 20>,                    
                    <TEGRA_DSI_PACKET_CMD DSI_DCS_LONG_WRITE 0x04 0x0 0x0 0xff 0x98 0x81 0x03 0x0 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x01 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x02 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x03 0x73 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x04 0x03 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x05 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x06 0x06 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x07 0x06 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x08 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x09 0x18 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x0a 0x04 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x0b 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x0c 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x0d 0x03 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x0e 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x0f 0x25 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x10 0x25 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x11 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x12 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x13 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x14 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x15 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x16 0x0C 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x17 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x18 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x19 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x1a 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x1b 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x1c 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x1d 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x1e 0xC0 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x1f 0x80 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x20 0x04 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x21 0x01 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x22 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x23 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x24 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x25 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x26 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x27 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x28 0x33 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x29 0x03 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x2a 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x2b 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x2c 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x2d 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x2e 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x2f 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x30 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x31 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x32 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x33 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x34 0x04 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x35 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x36 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x37 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x38 0x3C 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x39 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x3a 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x3b 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x3c 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x3d 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x3e 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x3f 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x40 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x41 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x42 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x43 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x44 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x50 0x01 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x51 0x23 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x52 0x45 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x53 0x67 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x54 0x89 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x55 0xab 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x56 0x01 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x57 0x23 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x58 0x45 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x59 0x67 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x5a 0x89 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x5b 0xab 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x5c 0xcd 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x5d 0xef 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x5e 0x11 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x5f 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x60 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x61 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x62 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x63 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x64 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x65 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x66 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x67 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x68 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x69 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x6a 0x0C 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x6b 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x6c 0x0F 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x6d 0x0E 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x6e 0x0D 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x6f 0x06 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x70 0x07 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x71 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x72 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x73 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x74 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x75 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x76 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x77 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x78 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x79 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x7a 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x7b 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x7c 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x7d 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x7e 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x7f 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x80 0x0C 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x81 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x82 0x0F 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x83 0x0E 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x84 0x0D 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x85 0x06 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x86 0x07 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x87 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x88 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x89 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x8A 0x02 0x0>,
                    <TEGRA_DSI_PACKET_CMD DSI_DCS_LONG_WRITE 0x04 0x0 0x0 0xff 0x98 0x81 0x04 0x0 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x6C 0x15 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x6E 0x22 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x6F 0x33 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x3A 0xA4 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x8D 0x0D 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x87 0xBA 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x26 0x76 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xB2 0xD1 0x0>,
                    <TEGRA_DSI_PACKET_CMD DSI_DCS_LONG_WRITE 0x04 0x0 0x0 0xff 0x98 0x81 0x01 0x0 0x0>,     
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x22 0x0A 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x53 0xDC 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x55 0xA7 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x50 0x78 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x51 0x78 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x31 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x60 0x14 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xA0 0x2A 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xA1 0x39 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xA2 0x46 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xA3 0x0e 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xA4 0x12 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xA5 0x25 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xA6 0x19 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xA7 0x1d 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xA8 0xa6 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xA9 0x1C 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xAA 0x29 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xAB 0x85 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xAC 0x1C 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xAD 0x1B 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xAE 0x51 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xAF 0x22 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xB0 0x2d 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xB1 0x4f 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xB2 0x59 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xB3 0x3F 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xC0 0x2A 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xC1 0x3a 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xC2 0x45 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xC3 0x0e 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xC4 0x11 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xC5 0x24 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xC6 0x1a 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xC7 0x1c 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xC8 0xaa 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xC9 0x1C 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xCA 0x29 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xCB 0x96 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xCC 0x1C 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xCD 0x1B 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xCE 0x51 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xCF 0x22 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xD0 0x2b 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xD1 0x4b 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xD2 0x59 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0xD3 0x3F 0x0>;
3

Could you check if tegra DSI driver is sending cmd data to your panel?

4

What kind of check is it?
I can modify the driver.

5

If the driver is able to send, then maybe you need a DSI analyzer to check whether DSI driver is sending the correct cmd to your panel.

6

Also, which panel driver is in use now? It looks like something “dsi_l_720p_5_loki_enable” is in use.

But our default panel driver is panel/panel-s-wuxga-8-0.c.

7

Sorry. I don’t have a dsi analyzer.
I modified panel-720p-5-loki.c and dts
The command in the ILI9881D+HSD5.0_720x1280_3LINE.txt file has been added to dsi-init-cmd.
Is there any problem with dsi-init-cmd?
And, please tell me how to send the data below continuously.

                    <0x0 DSI_DCS_WRITE_1_PARAM 0x01 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x02 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x03 0x73 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x04 0x03 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x05 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x06 0x06 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x07 0x06 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x08 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x09 0x18 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x0a 0x04 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x0b 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x0c 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x0d 0x03 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x0e 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x0f 0x25 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x10 0x25 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x11 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x12 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x13 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x14 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x15 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x16 0x0C 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x17 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x18 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x19 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x1a 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x1b 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x1c 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x1d 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x1e 0xC0 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x1f 0x80 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x20 0x04 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x21 0x01 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x22 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x23 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x24 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x25 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x26 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x27 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x28 0x33 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x29 0x03 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x2a 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x2b 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x2c 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x2d 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x2e 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x2f 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x30 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x31 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x32 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x33 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x34 0x04 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x35 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x36 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x37 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x38 0x3C 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x39 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x3a 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x3b 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x3c 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x3d 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x3e 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x3f 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x40 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x41 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x42 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x43 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x44 0x00 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x50 0x01 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x51 0x23 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x52 0x45 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x53 0x67 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x54 0x89 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x55 0xab 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x56 0x01 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x57 0x23 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x58 0x45 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x59 0x67 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x5a 0x89 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x5b 0xab 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x5c 0xcd 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x5d 0xef 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x5e 0x11 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x5f 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x60 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x61 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x62 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x63 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x64 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x65 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x66 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x67 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x68 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x69 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x6a 0x0C 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x6b 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x6c 0x0F 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x6d 0x0E 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x6e 0x0D 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x6f 0x06 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x70 0x07 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x71 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x72 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x73 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x74 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x75 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x76 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x77 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x78 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x79 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x7a 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x7b 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x7c 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x7d 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x7e 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x7f 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x80 0x0C 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x81 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x82 0x0F 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x83 0x0E 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x84 0x0D 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x85 0x06 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x86 0x07 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x87 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x88 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x89 0x02 0x0>,
                    <0x0 DSI_DCS_WRITE_1_PARAM 0x8A 0x02 0x0>,
8

I don’t know if the dsi-init cmd is wrong or not. This should be provided by your DSI panel vendor.

As I said, the only DSI panel that is validated on TX2 is “panel-s-wuxga-8-0.dtsi” which is a panel from Sharp.

9

The method of sending dsi-init-cmd is different for each CPU.
I think the cpu vendor should support it.
Is it correct to send using DSI_DCS_WRITE_1_PARAM?
And please tell me how to send in burst method.

10

You could refer to the TX2 TRM in our download center and the dsi section.

And for each property in the device tree, please download old k4.4 (rel-28) version source code and check below file.

kernel/kernel-4.4/Documentation/devicetree/bindings/video/nvidia,tegra186-dsi.txt

11

bootlog_3.txt (86.6 KB)

Currently, white is displayed on the entire LCD screen.
I have attached the boot log file.
Anything else to check?