Please provide the following info (check/uncheck the boxes after clicking “+ Create Topic”): Software Version
DRIVE OS Linux 126.96.36.199
DRIVE OS Linux 5.2.0 and DriveWorks 3.5
NVIDIA DRIVE™ Software 10.0 (Linux)
NVIDIA DRIVE™ Software 9.0 (Linux)
other DRIVE OS version
I made a script that reads the frame count registers for all VI channels (see below).
I am expecting to get some count greater than zero when I run the script while I’m running nvmimg_cc with a working setup (SEKO camera, captured image is displayed on the screen).
But all registers are returning zeros (0x00000000) !?
While nvmimg_cc is running, 0x15F19C7 almost always reads 0x00000000, very rarely I see 0x00001000
With nvmimg_cc stopped, 0x15F19C7 always reads 0x00002001
This is not what I expect. I expect the corresponding channel frame_count register to count up and see an increasing number for Frame Start and Frame End in the register. The counters in the register are 12 bit wide so they can count frames for 136 seconds (at 30fps) before they saturate.
What does value in register 0x15F19C34 indicate?
Why do you ask me to read channel 35 (only)?
The Note you pointed to says: “The vi_channel_no starts from 35 downwards for RGB, RAW, and YUV packed formats, and from 0 upwards for YUV planar and semiplanar formats.”
If I understand the note correctly, vi channel 35 would be for RGB. But the nvmimg_cc application uses RAW12 !?
Any ideas how I can get the debugging (registers) going?
I confirmed that the debug method mentioned in VI Frame Count section doesn’t work because the registers get clear for other functions.
Please try with the method of CSI Debug Counters section. Thanks.
#program debug control 0 to read VC0 EOF events on stream 0
devmem2 0x15a00084 w 0x701 #program debug control 1 to read VC0 SOF events on stream 0
devmem2 0x15a00088 w 0x801 #clear debuf counter 0
devmem2 0x15a0009c w 0x1 #clear debug counter 1
devmem2 0x15a000a0 w 0x1
read EOF/SOF count
devmem2 0x15a0009c; devmem2 0x15a000a0
Memory mapped at address 0x7f88aea000.
Value at address 0x15A0009C (0x7f88aea09c): 0x0000003F
Memory mapped at address 0x7fb5e33000.
Value at address 0x15A000A0 (0x7fb5e330a0): 0x0000003F
I have done exactly what you described and all counters for SOF/EOF are reading zero all the time.
They read zero while the camera capture is running and they read zero after stopping the capture.
So nvmimg_cc seems to not use VC0, is that correct? Which VC does nvmimg_cc use?
The question in my last post was regarding the VI Channel registers, not the CSI Debug Counters.
Register addresses are only given for VI channel 0. Can you please provide the register addresses of the other VI channels. And alos some information on which VI channels are used.