Nvmimg_cc CSI debugging

Please provide the following info (check/uncheck the boxes after clicking “+ Create Topic”):
Software Version
DRIVE OS Linux 5.2.0 and DriveWorks 3.5
NVIDIA DRIVE™ Software 10.0 (Linux)
NVIDIA DRIVE™ Software 9.0 (Linux)
other DRIVE OS version

Target Operating System

Hardware Platform
NVIDIA DRIVE™ AGX Xavier DevKit (E3550)
NVIDIA DRIVE™ AGX Pegasus DevKit (E3550)

SDK Manager Version

Host Machine Version
native Ubuntu 18.04
Hello vNIDIA experts,

I’m follwing the nVIDIA CSI debug instructions found here:

I made a script that reads the frame count registers for all VI channels (see below).
I am expecting to get some count greater than zero when I run the script while I’m running nvmimg_cc with a working setup (SEKO camera, captured image is displayed on the screen).
But all registers are returning zeros (0x00000000) !?

What am I doing wrong?

Here is the script I’m using:

echo on > /sys/devices/platform/host1x/15a00000.nvcsi/power/control
echo on > /sys/devices/platform/host1x/15c10000.vi/power/control
echo 1 > /sys/devices/platform/host1x/15a00000.nvcsi/acm/force_on
echo 1 > /sys/devices/platform/host1x/15c10000.vi/acm/force_on
devmem2 0x15f11070
devmem2 0x15f11470
devmem2 0x15f11870
devmem2 0x15f11c70
devmem2 0x15f12070
devmem2 0x15f12470
devmem2 0x15f12870
devmem2 0x15f12c70
devmem2 0x15f13070
devmem2 0x15f13470
devmem2 0x15f13870
devmem2 0x15f13c70
devmem2 0x15f14070
devmem2 0x15f14470
devmem2 0x15f14870
devmem2 0x15f14c70
devmem2 0x15f15070
devmem2 0x15f15470
devmem2 0x15f15870
devmem2 0x15f15c70
devmem2 0x15f16070
devmem2 0x15f16470
devmem2 0x15f16870
devmem2 0x15f16c70
devmem2 0x15f17070
devmem2 0x15f17470
devmem2 0x15f17870
devmem2 0x15f17c70
devmem2 0x15f18070
devmem2 0x15f18470
devmem2 0x15f18870
devmem2 0x15f18c70
devmem2 0x15f19070
devmem2 0x15f19470
devmem2 0x15f19870

framecounter-regs.txt (3.8 KB)

Hi @pirmin_weisser ,

We will check internally and update you. Thanks.

Please try to read Pixel Width of frame register and FRAME_COUNT register of channel 35 (0x15F19C34 and 0x15F19C70 respectively) and see if any non zero values.

The following is the note about channels. FYR.

Hello VickNV,

0x15F19C34 always reads 0x00000780

While nvmimg_cc is running, 0x15F19C7 almost always reads 0x00000000, very rarely I see 0x00001000
With nvmimg_cc stopped, 0x15F19C7 always reads 0x00002001

This is not what I expect. I expect the corresponding channel frame_count register to count up and see an increasing number for Frame Start and Frame End in the register. The counters in the register are 12 bit wide so they can count frames for 136 seconds (at 30fps) before they saturate.

What does value in register 0x15F19C34 indicate?

Why do you ask me to read channel 35 (only)?

The Note you pointed to says: “The vi_channel_no starts from 35 downwards for RGB, RAW, and YUV packed formats, and from 0 upwards for YUV planar and semiplanar formats.”

If I understand the note correctly, vi channel 35 would be for RGB. But the nvmimg_cc application uses RAW12 !?

Any ideas how I can get the debugging (registers) going?


We can also observe the same and are checking internally. Once any finding, will update you here.

About the note, it means for any of RGB, RAW, and YUV packed formats it starts from channel 35. Sorry for the unclear information.

I confirmed that the debug method mentioned in VI Frame Count section doesn’t work because the registers get clear for other functions.
Please try with the method of CSI Debug Counters section. Thanks.

Hello VickNV,

Any news on how to make the debugging registers work ?

I have looked at the documentation of the CSI debug counters described further down on https://docs.nvidia.com/drive/drive-os-
Do these registers work as described or do they also not work?

And then at the end of the page the VI channel register are mentioned.
But only addresses for VC0-registers are given:

Can you please forward the addresses of the VI channel registers for VC1 to VC15.

Please refer to CSI Debug Counters and the following example to read the counts.

program registers

#program debug control 0 to read VC0 EOF events on stream 0
devmem2 0x15a00084 w 0x701
#program debug control 1 to read VC0 SOF events on stream 0
devmem2 0x15a00088 w 0x801
#clear debuf counter 0
devmem2 0x15a0009c w 0x1
#clear debug counter 1
devmem2 0x15a000a0 w 0x1

read EOF/SOF count

devmem2 0x15a0009c; devmem2 0x15a000a0
/dev/mem opened.
Memory mapped at address 0x7f88aea000.
Value at address 0x15A0009C (0x7f88aea09c): 0x0000003F
/dev/mem opened.
Memory mapped at address 0x7fb5e33000.
Value at address 0x15A000A0 (0x7fb5e330a0): 0x0000003F

Thanks VickNV,

I have done exactly what you described and all counters for SOF/EOF are reading zero all the time.
They read zero while the camera capture is running and they read zero after stopping the capture.
So nvmimg_cc seems to not use VC0, is that correct? Which VC does nvmimg_cc use?

The question in my last post was regarding the VI Channel registers, not the CSI Debug Counters.
Register addresses are only given for VI channel 0. Can you please provide the register addresses of the other VI channels. And alos some information on which VI channels are used.


I tried with nvsipl_camera. Could you try with it? Or you can check event indices of other VCs.

The same registers of different VI channels has 0x400 offset which is implied in “VI Frame Count” section.