Hi,
We are developing a custom carrier board based on the AGX Orin module. Due to a change in the PCIe connector’s location on our upcoming board revision, we want to implement PCIe Lane Reversal to simplify PCB routing.
Current Status (Working):
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Routing: Standard order (Orin PHY Lane 0~7 connected to Slot Lane 0~7).
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Behavior: Works perfectly. x1, x2, x4, and x8 PCIe devices can all successfully link up.
Planned Change (Next Revision):
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Routing: Lane Reversal (Orin PHY Lane 7~0 connected to Slot Lane 0~7).
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Note: In this reversed routing, an x1 PCIe card plugged into the slot will physically mate with Orin’s PHY Lane 7.
Questions:
Does the AGX Orin PCIe controller support Lane Reversal on an x8 slot while maintaining backward compatibility for x1, x2, and x4 devices? (Specifically, can it successfully complete link training when an x1 device is connected to PHY Lane 7?)
Thanks