PCIe Configuration Orin NX 16GB

Hello,
we want to use the PCIe to connect a M.2 SSD and a GbE Phy. We have a custom pcb, but the problem is we didn’t find any documentation how to assign the correct pcie phys in the dtb.

We use following PCIe in these configurations:

  • PCIe C4 as 1 lane - NX Module Pins: 133, 131, 136, 134 and 162, 160
  • PCIe C7 as 2 lane - NX Module Pins: 42, 40, 48, 46, 60, 58, 66, 64 and 54, 52

How do I know which lane is connected with which phy? I couldn’t find this information in the TRM.

My devicetree for C4 currently looks like this:

pcie@14160000 {
            status = "okay";

            vddio-pex-ctl-supply = <&vdd_1v8_ao>;

            phys = <&p2u_hsio_4>, <&p2u_hsio_5>, <&p2u_hsio_6>,
			       <&p2u_hsio_7>;
			phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
        };

I know there are too many phys, which can be removed?

My devicetree for C7 looks like this:

v3d_pcie0: pcie@141e0000 {
            status = "okay";

            vddio-pex-ctl-supply = <&vdd_1v8_ao>;

            phys = <&p2u_gbe_0>, <&p2u_gbe_1>;
			phy-names = "p2u-0", "p2u-1";
        };

These are probably the wrong ones, I copied them from the devkit, the used the same PCIe, but with other pins.

Thanks for your help and kind regards,
Thomas

Hi,

The reason that it does not have anything listed in the document is because this thing is the default setting. You don’t need to change anything.

C4 is whether 1 lane or 4 lane does not matter. The driver has compatibility to support 1 lane even the software setting is 4 lane.

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