PCIe pin number issue

Robotics & Edge Computing Jetson & Embedded Systems Jetson AGX Orin
1

Hi Sir,
We are working on r36.4.2.

And we manage to enable PCIe C0 & PCIe C7.

According to NV online document:

We need to modify
PEX_L*_RST_N
PEX_L*_CLKREQ_N

According to pinmux spreadsheet:
image

And
image

So, the pin name table is supposed to be as below:

PCIe C0:
PEX_L7_RST_N
PEX_L7_CLKREQ_N

PCIe C7:
PEX_L1_RST_N
PEX_L1_CLKREQ_N

However, according to the diff file of NV document:

image
image821×558 89.1 KB

image
image812×566 90.3 KB

=>The pin names seem to be as below:
PCIe C0:
PEX_L7_RST_N
PEX_L7_CLKREQ_N

PCIe C7:
PEX_L0_RST_N
PEX_L0_CLKREQ_N

It is confusing. Which table is correct ?
Please advise. Thanks.

Jimmy

2

*** Please note that this reply is generated by LLM automatically ***

Based on the provided context, I will attempt to clarify the confusion regarding the pin names for PCIe C0 and PCIe C7 on the Jetson AGX Orin platform.

According to the Jetson AGX Orin Platform Adaptation and Bring-Up document from NVIDIA, the pin names for PCIe C0 and PCIe C7 are supposed to be:

  • PCIe C0: PEXL7RSTN, PEXL7CLKREQN
  • PCIe C7: PEXL1RSTN, PEXL1CLKREQN

However, the diff file from the NVIDIA document shows different pin names:

  • PCIe C0: PEXL7RSTN, PEXL7CLKREQN
  • PCIe C7: PEXL0RSTN, PEXL0CLKREQN

To resolve this discrepancy, let’s examine the available information:

  1. The Jetson AGX Orin pinmux spreadsheet is mentioned as a reference for configuring pinmux on the Jetson AGX Orin devices. Although the spreadsheet is not provided, it is likely that the correct pin names are listed in this document.
  2. The Orin pinmux table is another document that lists the pin details for the Orin platform. This document might also provide clarification on the correct pin names.
  3. The NVIDIA Jetson Linux Developer Guide might contain information on the pin names and their usage.

Considering the information available, I would recommend the following steps to resolve the confusion:

  1. Verify the pin names in the Jetson AGX Orin pinmux spreadsheet and the Orin pinmux table to ensure consistency.
  2. Consult the NVIDIA Jetson Linux Developer Guide for any information on the pin names and their usage.
  3. If the confusion persists, it may be necessary to contact NVIDIA support or seek further clarification from the NVIDIA documentation team.

In summary, while the provided information suggests that there might be a discrepancy in the pin names for PCIe C0 and PCIe C7, it is essential to verify the correct pin names through multiple sources, including the Jetson AGX Orin pinmux spreadsheet, the Orin pinmux table, and the NVIDIA Jetson Linux Developer Guide.

*** Please give the thumbs up if you get answers you like. Or provide feedback to help us improve the answer. ***

4

@carolyuu
AI’s answer doesn’t help & human support is appreciated.

Thanks.

Jimmy

5

Hi,

Please refer to below topics:

Thanks

7

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