PCIe x4 + x1

Hi all,

Regarding TRM p2360 section 32.4.21 in the AFI PCIe config, we can read that it is possible to configure the TK1 with PCIe x4 + x1.

Same thing still in the TRM p2261 in the section 32.0 on the figure 119 we can see the PCIe controller has 5 lanes and seems to support PCIe x4 + x1.

However in the datasheet p62, it’s stated “K1 series processors integrate a x4 lane PCIe bridge to enable a control path from the Tegra chip to external PCIe devices”.

So it is confusing if this configuration could be used on our custom board.

Best regards,

Yes, TK1 supports PCIe x4 + x1 configuration, we successfully used it on our custom board.

Okay great !

And what are the steps you’ve used in the DTS and XUSB_PADCTL configurations ?
What slow IOs did you wire ? (RST, CLKREQ, WAKE…)


codebase has support for x4 and x1 and it should work out of the box given Tx,Rx,RST,REFCLK lanes routing in your custom board is proper.

Is the issue you are seeing in u-boot or kernel?
Can you share your schematic?


It is easy to do the change.