POR Pin state and requirement for no pins to have voltage applied during power on before boot

I was running into an issue with a voltage level translator we added to our custom board. The Nano refused to boot if it received any 1.8V voltage applied to GPIO pins, through pull-ups on the VLT. I ended up fixing it by only enabling the VLT with the sys_reset pin.

My question is that if I change all of the GPIO pins including SPI, and etc to have a POR pin state of “z”, so high-impedance, would that essentially solve the problem if I were to accidentally apply an initial voltage to any of the GPIO pins before the power_en pin is pulled high? I noticed that the I2C pins do have “z” POR pin state.

Just in case someone isn’t familiar with the pinmux excel sheet, POR is separate from the initial pin state once the system boots. So I would set the proper pin states I want for the GPIOs once the system is booting, but prior to this, when power_en is pulled high, all pins would start “high-z”.


It is not recommended to set all GPIO pins POR state to “z”. The key point is your design should follow the power on sequence as listed in Design Guide, which request the carrier power rails should be controlled by carrier_power_on signal and turn on after module power rails.

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