I’m using the custom carrier board for AGX Orin.
nv_tegra_release: R36 (release), REVISION:3.0
I have a question because AQR113C (10G PHY) ID can be read through MDIO between Orin and AQR113C, but 10G operation is impossible after this.
I am attaching the “dmesg” log to the attachment, so I would like to ask you to check if you can provide information about the part that is not functioning.
log_dmesg.txt (58.2 KB)
Does the AQR113C firmeware get pre-flashed?
Yes, AQR113C Firmware flashed.
Firmware binary file from Marvell:
AQR-G4_v5.6.1-AQR_Marvell_NoSwap_XFI_ID44874_VER1836.cld
The version we are using on NV devkit is AQR113C firmware v5.6.7 VER1922.
Many thanks for your help.
I downloaded AQR113C firmware GeneralFW_v5.6.7_All_modes_notes.zip file.
and there are many kinds of VER1922 files.
Please advise me on the file to apply.
AQR-G4_v5.6.7-AQR_Marvell_NoSwap_USX_ID44858_VER1922.cld
AQR-G4_v5.6.7-AQR_Marvell_NoSwap_USX_TXDisable_ID44862_VER1922.cld
AQR-G4_v5.6.7-AQR_Marvell_NoSwap_XFI2500SGMII_ID44842_VER1922.cld
AQR-G4_v5.6.7-AQR_Marvell_NoSwap_XFI2500SGMII_TXDisable_ID44846_VER1922.cld
AQR-G4_v5.6.7-AQR_Marvell_NoSwap_XFI2500_ID44838_VER1922.cld
AQR-G4_v5.6.7-AQR_Marvell_NoSwap_XFI2500_TXDisable_ID44850_VER1922.cld
AQR-G4_v5.6.7-AQR_Marvell_NoSwap_XFI_ID44834_VER1922.cld
AQR-G4_v5.6.7-AQR_Marvell_NoSwap_XFI_TXDisable_ID44854_VER1922.cld
AQR-G4_v5.6.7-AQR_Marvell_Swap_USX_ID44860_VER1922.cld
AQR-G4_v5.6.7-AQR_Marvell_Swap_USX_TXDisable_ID44864_VER1922.cld
AQR-G4_v5.6.7-AQR_Marvell_Swap_XFI2500SGMII_ID44844_VER1922.cld
AQR-G4_v5.6.7-AQR_Marvell_Swap_XFI2500SGMII_TXDisable_ID44848_VER1922.cld
AQR-G4_v5.6.7-AQR_Marvell_Swap_XFI2500_ID44840_VER1922.cld
AQR-G4_v5.6.7-AQR_Marvell_Swap_XFI2500_TXDisable_ID44852_VER1922.cld
AQR-G4_v5.6.7-AQR_Marvell_Swap_XFI_ID44836_VER1922.cld
AQR-G4_v5.6.7-AQR_Marvell_Swap_XFI_TXDisable_ID44856_VER1922.cld
Regard,
netkerl
Here is a DT entry that I applied to my custom carrier board.
(R38 Release)
10G phy is connected with 10G RJ45 connector.
As following nvidia,phy-iface-mode = <0>;
with this mapping, I tried flashing 2 files AQR F/W AQR-G4_v5.6.7-AQR_Marvell_Swap_XFI_ID44836_VER1922.cld and
AQR-G4_v5.6.7-AQR_Marvell_Swap_USX_ID44860_VER1922.cld
(Which file should be applied?)
But 10G (MGBE) is not working now.
cf. if I type “ifconfig” then it always displays as “eth0” TX/RX packets 0
I read AQR ID as “31C3 1C12”
=========================
mgbe0: ethernet@6800000 {
nvidia,mac-addr-idx = <0>;
nvidia,max-platform-mtu = <16383>;
/* 1=enable, 0=disable /
nvidia,pause_frames = <1>;
phy-handle = <&mgbe0_aqr113c_phy>;
/ 0:XFI 10G, 1:XFI 5G, 2:USXGMII 10G, 3:USXGMII 5G */
nvidia,phy-iface-mode = <0>;
nvidia,phy-reset-gpio = <&gpio TEGRA234_MAIN_GPIO(Y, 1) 0>;
nvidia,mdio_addr = <0>;
mdio {
compatible = "nvidia,eqos-mdio";
#address-cells = <1>;
#size-cells = <0>;
mgbe0_aqr113c_phy: ethernet_phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x0>;
nvidia,phy-rst-pdelay-msec = <150>; /* msec */
nvidia,phy-rst-duration-usec = <221000>; /* usec */
interrupt-parent = <&gpio>;
interrupts = <TEGRA234_MAIN_GPIO(Y, 3) IRQ_TYPE_LEVEL_LOW>;
};
};
};
Linux_for_Tegra/source/hardware/nvidia/t23x/nv-public/nv-platform/tegra234-p3737-0000.dtsi
…
mgbe0: ethernet@6800000 {
nvidia,mac-addr-idx = <0>;
nvidia,max-platform-mtu = <16383>;
/* 1=enable, 0=disable /
nvidia,pause_frames = <1>;
phy-handle = <&mgbe0_aqr113c_phy>;
/ 0:XFI 10G, 1:XFI 5G, 2:USXGMII 10G, 3:USXGMII 5G */
nvidia,phy-iface-mode = <0>;
nvidia,phy-reset-gpio = <&gpio TEGRA234_MAIN_GPIO(Y, 1) 0>;
nvidia,mdio_addr = <0>;
mdio {
compatible = "nvidia,eqos-mdio";
#address-cells = <1>;
#size-cells = <0>;
mgbe0_aqr113c_phy: ethernet_phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x0>;
nvidia,phy-rst-pdelay-msec = <150>; /* msec */
nvidia,phy-rst-duration-usec = <221000>; /* usec */
interrupt-parent = <&gpio>;
interrupts = <TEGRA234_MAIN_GPIO(Y, 3) IRQ_TYPE_LEVEL_LOW>;
};
};
};
nvpps {
status = "okay";
compatible = "nvidia,tegra234-nvpps";
primary-emac = <&mgbe0>;
sec-emac = <&mgbe0>;
reg = <0x0 0xc6a0000 0x0 0x1000>;
};
…
Linux_for_Tegra/source/hardware/nvidia/t23x/nv-public/tegra234-p3737-0000+p3701-0000.dts
…
ethernet@6800000 {
status = “okay”;
phy-handle = <&mgbe0_phy>;
phy-mode = "10gbase-r";
mdio {
#address-cells = <1>;
#size-cells = <0>;
mgbe0_phy: phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x0>;
#phy-cells = <0>;
};
};
…
Hi, WayneWWW,
Are there any updates?
Hi,
Can I have the original DT Excel file matching R36?
hI, WayneWWW,
I am asking about a problem with AQR113C access where FW ID is always read as 0x00 when read with MDIO bus from CPU.
I read PHY ID as “31C3 1C12” with MDIO but after that reading FW ID of AQR113C is not the correct value response from AQR but read as 0x00.
I’m asking what’s wrong with AQR113C’s FW ID being read as 0x00.
I attach the FW ID read code (WORK:) below.
CODE:
// linux/mdio.h
define MDIO_MMD_VEND1 30 /* Vendor specific 1 */
// drivers/net/phy/aquantia_main.c
define VEND1_GLOBAL_FW_ID 0x0020
drivers/net/phy/aquantia_main.c
...
static int aqr107_wait_reset_complete(struct phy_device *phydev)
{
int val;
return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,
VEND1_GLOBAL_FW_ID, val,
((val & VEND1_GLOBAL_FW_ID_MASK) != 0 &&
(val & VEND1_GLOBAL_FW_ID_MASK) != VEND1_GLOBAL_FW_ID_MASK),
20000, 2000000, false);
}
...
RESULT:
[ 20.812954] Aquantia AQR113C 6810000.ethernet:00: aqr107_wait_reset_complete failed: -110
WORK:
val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_FW_ID);
val <= 0
Hi,
Actually you don’t need anything from device tree… I don’t know what is your purpose of asking this.
The original device tree already has MGBE enabled for AQR113C… If it cannot work on your board but work on devkit, then it means your firmware might be wrong…
You can search that error log in forum too and you will notice most of them are talking about wrong firmware…
Hi,
As you recommended the version is as follows but they do not all work.
I applied as below Fireware files.
AQR_Marvell_Swap_XFI2500_ID44840_VER1922.cld
AQR-G4_v5.6.7-AQR_Marvell_Swap_XFI_ID44836_VER1922.cld
AQR-G4_v5.6.7-AQR_Marvell_Swap_USX_ID44860_VER1922.cld
Please recommend me again the exact Firmware file.
Regards,
netkerl
We don’t know what is the difference between these firmeware. Please check with the vendor.
Hello, I have encountered the same issue with the customized version I am using. The error is Aquantia AQR113C 6810000. Ethernet: 00: aqr107_wait_reset_complete failed: -110, but I cannot contact Marvell. How should I flash the firmware?
Hello, I have the same problem as you. How did you solve it?
Yes, I solve it
First erase (Clear) EEPROM Firmware area with “00” and flash it again.
then AQR chip can load Firmware ID without garbage area data.
Maybe the problem was caused by the loading EEPROM unerased area and it was not erased data loading with garbage data to the AQR Memory without copying it to the AQR.
Thanks.
您好，你的意思是不能直接将AQR-G4_v5.6.1-AQR_Marvell_NoSwap_XFI_ID44874_VER1836.cld烧录到W25Q40EW spi flash中，而是要先擦除为00，然后再烧录吗？但我现在把orin开发套件的flash拆下贴到我们的开发板上还是会报错误如下：phyid会读7遍，第七遍为0，然后fw id也是0
[ 20.463710] libphy: cht phyreg1= 0x31c3
[ 20.468576] libphy: cht phyreg2=0x1c13
[ 20.473228] libphy: cht phyreg1= 0x31c3
[ 20.477943] libphy: cht phyreg2=0x1c13
[ 20.483426] libphy: cht phyreg1= 0x31c3
[ 20.488974] libphy: cht phyreg2=0x1c13
[ 20.494422] libphy: cht phyreg1= 0x31c3
[ 20.499933] libphy: cht phyreg2=0x1c13
[ 20.505325] libphy: cht phyreg1= 0x31c3
[ 20.510799] libphy: cht phyreg2=0x1c13
[ 20.516309] libphy: cht phyreg1= 0x31c3
[ 20.521539] libphy: cht phyreg2=0x1c13
[ 20.526274] libphy: cht phyreg1= 0x0
[ 20.530665] libphy: cht phyreg2=0x0
[ 22.570010] Aquantia AQR113C 6810000.ethernet:00: cht-FWID=0
[ 22.575873] Aquantia AQR113C 6810000.ethernet:00: aqr107_wait_reset_complete failed: -110
spi flash烧录一般应用软件都是默认自动擦除再烧录的，请问您这边还做了什么处理或者改动？
I believed it would automatically erase and refresh the EEPROM, but that doesn’t seem to be the case.
No other changes
但orin开发套件上的flash移到板子上为什么不行呢？orin是验过可以ping通的，请帮忙分析下还有什么排查思路