I have read two documents for jetson nano :
Jetson Nano System-on-Module Data Sheet V1.1, Page15, 2.6.1 Power Up
Jetson_Nano_Product_Design_Guide_DG-09502-001_v2.3.pdf, Page23, 5.1.2 Power Sequencing
Why in Jetson Nano System-on-Module Data Sheet V1.1, the sequence of power up does not have SHUTDOWN_REQ*, but in Jetson_Nano_Product_Design_Guide_DG-09502-001_v2.3, there is specification SHUTDOWN_REQ* in power up?
As said in DG: SHUTDOWN_REQ* is not driven during power-on. It is pulled up to the 5V supply, so stays inactive. If the system is on and reset is driven low, the PMIC will initiate a full power cycle and start the power-on sequence. Again, SHUTDOWN_REQ* is not asserted. SHUTDOWN_REQ* will only go low when the system needs to shut down.
So it is same to VDD_IN in power up sequence and has nothing to do with power on in fact.
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