Tegra K1 DDR comand pins remap

On TK1 Embedded Platform Design Guide chapter 3.3,it is said that “Tegra supports the remapping of the Address/Command/Control pins in order to make routing easier/cleaner.” May I ask how could I remap DRAM command signals inside TK1?

The reason why I want to know it is because a DDR schematic mistake was found in our custom board. It would be a good tricky method if we could remap the CMD signals.

There is a TegraK1_MemoryCharacterization_AppNote doc in the package, chapter 5.4 introduced the details of remapping.