I have viewed the jetson schematic and trying to compare with my custom board.
I have a confusion about DDR CS pins.
According to Design Guide
page # 29
Tegra Ball # : Tegra Ball Name : DDR3L Net Name : DDR Device : DDR Ball # : DDR Ball Name
B14 : DDR_CS0_N : DDR0_CS1_L : 1 & 2 : L1 : CS1_L
Now when i see the datasheet of DDR, the ball L1 is NC. this should be not connected.
So, can you explain the purpose of these CS pins.