Tx2-4 R32.3.1 tegra_pwm6 missing

Autonomous Machines Jetson & Embedded Systems Jetson TX2
,
1

Found that tegra_pwm6 is in the device tree and change it to status=“okay” but cat /sys/kernel/debug/pwm does not show pwm on 0x32d00000

sudo cat /sys/kernel/debug/pwm
platform/32c0000.pwm, 1 PWM device
pwm-0 ((null) ): period: 0 ns duty: 0 ns polarity: normal

platform/c340000.pwm, 1 PWM device
pwm-0 (pwm-fan ): requested enabled period: 45334 ns duty: 177 ns polarity: normal

platform/32a0000.pwm, 1 PWM device
pwm-0 ((null) ): period: 0 ns duty: 0 ns polarity: normal

platform/3290000.pwm, 1 PWM device
pwm-0 ((null) ): period: 0 ns duty: 0 ns polarity: normal

platform/3280000.pwm, 1 PWM device
pwm-0 (backlight ): requested enabled period: 40161 ns duty: 40161 ns polarity: normal

/sys/class/pwm$ ls
total 0
drwxr-xr-x 2 root root 0 Jan 25 16:18 ./
drwxr-xr-x 92 root root 0 Jan 25 16:18 …/
lrwxrwxrwx 1 root root 0 Jan 25 16:18 pwmchip0 → …/…/devices/3280000.pwm/pwm/pwmchip0/
lrwxrwxrwx 1 root root 0 Jan 25 16:18 pwmchip1 → …/…/devices/3290000.pwm/pwm/pwmchip1/
lrwxrwxrwx 1 root root 0 Jan 25 16:18 pwmchip2 → …/…/devices/32a0000.pwm/pwm/pwmchip2/
lrwxrwxrwx 1 root root 0 Jan 25 16:18 pwmchip3 → …/…/devices/c340000.pwm/pwm/pwmchip3/
lrwxrwxrwx 1 root root 0 Jan 25 16:18 pwmchip4 → …/…/devices/32c0000.pwm/pwm/pwmchip4/

device tree info
pwm@32d0000 {
compatible = “nvidia,tegra186-pwm”;
clocks = <0x10 0xbf 0x10 0x10d 0x10 0x261>;
resets = <0x10 0x68>;
clock-names = “pwm”, “parent”, “slow-parent”;
status = “okay”;
phandle = <0x76>;
reg = <0x0 0x32d0000 0x0 0x10000>;
reset-names = “pwm”;
linux,phandle = <0x76>;
#pwm-cells = <0x2>;
};

I have set up everything I know of is there a pinmux that needs to be touched to make this pwm work, I need it for lcd1_bklt_pwm right?

Terry

3

hello terrysu50z,

could you please examine the board configuration file for the tegra_pwm6’s settings.
i.e. $OUT/Linux_for_Tegra/bootloader/t186ref/BCT/tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.cfg

you may also check below similar discussion threads for reference,
thanks

4

examine the cfg file for what?

the LCD1_BLKT_PWM thread has been followed and the pinmux in #1 shows I have that.

What does pulse counting and fan have to do with pwm6,

**Please tell me the correct hardware to use to get LCD1_BKLT_PWM to work! is it really 0xc301a8 and if that is true please tell me which on of the pwms is attached to that pin. Need correct information to put into cfg file because you delivered R32.3.1 with the tach enabled I think instead of the generic pwm

**Or tell me where to find the tegra hardware document so I can try to figure this out myself ****

5

hello terrysu50z,

it’s IC Ball name is GPIO_DIS5, you may check the board configure file,
for example,

pinmux.0x0c3010a8 = 0x00000401; # gpio_dis5_pu5: gp, tristate-disable, input-disable, lpdr-disable

you should also check from kernel side for its register settings.
for example, # cat /sys/kernel/debug/tegra_pinctrl_reg | grep pu5
thanks

7

Got this How do I make LCD1_BLK_PWM work? what tegra_pwmx do I use?

$ sudo cat /sys/kernel/debug/tegra_pinctrl_reg | grep pu5
Bank: 1 Reg: 0x0c3010a8 Val: 0x00000401 → gpio_dis5_pu5

9

Could you share the full dmesg and the result of below?

xxd /proc/device-tree/pwm@32d0000/status

10

xxd /proc/device-tree/pwm@32d0000/status
00000000: 6f6b 6179 00 okay.

I can give you the complete dmesg, but I think this is what is going wrong.

got this message in dmesg

ERROR: could not get clock /pwm@32d0000:pwm(0)
ERROR: could not get clock /pwm@32e0000:pwm(0)
What clocks am I missing.

also this is related to Tx2-4g R32.3.1 pwm@32d0000 configuration fail

Don’t know how to link to another thread

Terry

11

should be this one, Tx2-4g R32.3.1 pwm@32d0000 configuration fail, right?
you may leave the topic-id or copy-paste http linkage here for reference,
thanks

12

I just want LCD1_BLK_PWM to work.

13

Ok, we all know you want LCD1_PWM_BKLT.

Still need your full dmesg and full dts here. Please attach.

14

deviceTree (254.6 KB) dmesg.txt (78.1 KB)

The files you asked for, using pwm_led to point at &tegra_pwm6 and 0x0c03010a8 is 0x401, but pwm6 init/dmesg shows pwm6 clock is missing.

Terry

18

please dont use PWM6. Is it coming out of the CVM module for you to use?
PWM6 is used internally for OVR regulator to generate RAMUP power supply for SOC DVFS.
PWM7 also is out of bound.
Please check pinmux sheet and schematic before repurposing any pin

19

Hi,

Sorry that I didn’t notice this. If you want to use LCD1_PWM_BKLT, then you should not use pwm6.

Below snippet is from the pwm. Please check this section and pick up the correct pwm you want to use.

image
image1343×605 229 KB

20

Still I ask again, please answer this! This simple question is taking Nvidia months to answer!

what pwm is connected to pinmux 0x0c03010a8

What is the correct pinmux for LCD1_BLKT_PWM and what is the correct pwm? for LCD1_BLKT_PWM

Terry

21

Hi,

0x0c03010a8 is the LCD1_BLKT_PWM. This is correct.

22

Still I ask again, please answer this! This simple question is taking Nvidia months to answer!

Now which pwm is for LCD1_BLK_PWM, you have never said!

23

Hi,

Use these two tables and you should be able to use pwm3 for that pwm.

image
image1343×605 229 KB

image
image1388×394 177 KB

24

Please explain how you get pwm3 from these two tables, where do I find the LCD1_BLKT_PWM to tegra_pwm mapping?

I will try pwm3, thanks,
Terry

25

Hi,

Open your pinmux spread sheet. This line will tell you this pinx is GPIO_DSI0.

image
image813×19 1.27 KB

Or just checked @JerryChang’s comment above. He already told you the pin GPIO_DIS5.

image
image1850×708 52 KB

Then, check the table from TRM, which I posted above. You should be able to get pwm3.

26

you need to use the spread sheet and the two tables to get the right information.

tried tegra_pwm3, the hardware guy said it did not work.

How do I make LCD1_BLKT_PWM work?

Thanks,
Terry