vi2 channel error while streaming MT9M021

I have a MT9M021 based camera with a MIPI bridge connected to a TXI through an ConnectTech Elroy carrier board. I am able to detect the sensor but when I attempt to stream from camera, I obtain challel error:

v4l2-ctl -d /dev/video0 --set-fmt-video=width=1920,height=1080 --set-ctrl bypass_mode=0 --set-ctrl gain=10 --set-ctrl exposure=100025 --set-ctrl sensor_mode=254 --stream-mmap --stream-count=1 --stream-to=f0.raw

Error is :

[  479.444167] mt9m021 6-0010: Starting stream
[  479.444209] mt9m021 6-0010: mt9m021_write: 0x10dc to 0x301a
[  479.451497] vi vi: vi2_channel_error_status:error 4022 frame 0
[  479.473658] vi vi: vi2_channel_error_status:error 4022 frame 1
[  479.490246] vi vi: vi2_channel_error_status:error 4022 frame 2
[  479.506839] vi vi: vi2_channel_error_status:error 4022 frame 3
[  479.523450] vi vi: vi2_channel_error_status:error 4022 frame 4
[  479.540067] vi vi: vi2_channel_error_status:error 4022 frame 5
[  479.556755] vi vi: vi2_channel_error_status:error 4022 frame 6
[  479.573282] vi vi: vi2_channel_error_status:error 4022 frame 7
[  479.589879] vi vi: vi2_channel_error_status:error 4022 frame 8
[  479.606509] vi vi: vi2_channel_error_status:error 4022 frame 9
[  479.656403] vi vi: vi2_channel_error_status:error 4022 frame 10
[  479.673551] vi vi: vi2_channel_error_status:error 4022 frame 11
[  479.690117] vi vi: vi2_channel_error_status:error 4022 frame 12
[  479.706712] vi vi: vi2_channel_error_status:error 4022 frame 13
[  479.722975] vi vi: vi2_channel_error_status:error 4022 frame 14
[  479.739370] vi vi: vi2_channel_error_status:error 4022 frame 15
[  479.756202] vi vi: vi2_channel_error_status:error 4022 frame 16
[  479.772794] vi vi: vi2_channel_error_status:error 4022 frame 17

ubuntu@tegra-ubuntu:~$ v4l2-ctl -V
Format Video Capture:
Width/Height : 1280/720
Pixel Format : ‘RG12’
Field : None
Bytes per Line : 2560
Size Image : 1843200
Colorspace : sRGB
Transfer Function : Default
YCbCr Encoding : Default
Quantization : Default
Flags :

Can you please help me with the debug.

hello EV,

according to your v4l2-ctl -V information.
you had request image resolution larger than sensor capability.
could you please try to access camera with default v4l2-ctl settings.
for example:

v4l2-ctl -d /dev/video0 --stream-mmap --stream-count=1 --stream-to=test.raw

It doesn’t really help. I am getting the same error.

[70583.793941] mt9m021 6-0010: Starting stream
[70583.794020] mt9m021 6-0010: mt9m021_write: 0x10dc to 0x301a
[70583.805762] vi vi: vi2_channel_error_status:error 4022 frame 0
[70583.811956] (NULL device *): camera_common_dpd_enable: csi 0
[70583.811989] mt9m021 6-0010: mt9m021_s_stream
[70583.812010] mt9m021 6-0010: Ending stream
[70583.812035] mt9m021 6-0010: mt9m021_write: 0x00d8 to 0x301a
[70583.816936] (NULL device *): camera_common_dpd_enable: csi 0
[70583.816984] mt9m021 6-0010: mt9m021_set_power value: 0
[70583.817009] mt9m021 6-0010: mt9m021_power_off

Please let me know if you want any other additional information that would be helpful.

hello EV,

may i have more information about your environment?

  1. which JetPack version you’re using
  2. is vi-bypass mode workable? (for example. nvgstcapture-1.0 or gst-launch-1.0)

Hi Jerry,

  1. I am using Jetpack v24.2.1
  2. I tried nvgstcapture-1.0 (without any argument. This is the output I receive:
ubuntu@tegra-ubuntu:~$ nvgstcapture
nvgstcapture      nvgstcapture-1.0
ubuntu@tegra-ubuntu:~$ nvgstcapture-1.0
Encoder null, cannot set bitrate!
Encoder Profile = Baseline
Supported resolutions in case of CSI Camera
  (2) : 640x480
  (3) : 1280x720
  (4) : 1920x1080
  (5) : 2104x1560
  (6) : 2592x1944
  (7) : 2616x1472
  (8) : 3840x2160
  (9) : 3896x2192
  (10): 4208x3120
  (11): 5632x3168
  (12): 5632x4224

Runtime CSI Camera Commands:

  Help : 'h'
  Quit : 'q'
  Set Capture Mode:
      mo:<val>
          (1): image
          (2): video
  Get Capture Mode:
      gmo
  Set Sensor Id (0 to 10):
      sid:<val> e.g., sid:2
  Get Sensor Id:
      gsid
  Set sensor orientation:
      so:<val>
          (0): none
          (1): Rotate counter-clockwise 90 degrees
          (2): Rotate 180 degrees
          (3): Rotate clockwise 90 degrees
  Get sensor orientation:
      gso
  Set Whitebalance Mode:
      wb:<val>
          (0): off
          (1): auto
          (2): incandescent
          (3): fluorescent
          (4): warm-fluorescent
          (5): daylight
          (6): cloudy-daylight
          (7): twilight
          (8): shade
          (9): manual
  Get Whitebalance Mode:
      gwb
  Set Scene-Mode:
      scm:<val>
          (0): face-priority
          (1): action
          (2): portrait
          (3): landscape
          (4): night
          (5): night-portrait
          (6): theatre
          (7): beach
          (8): snow
          (9): sunset
          (10): steady-photo
          (11): fireworks
          (12): sports
          (13): party
          (14): candle-light
          (15): barcode
  Get Scene-Mode:
      gscm
  Set Color Effect Mode:
      ce:<val>
          (1): off
          (2): mono
          (3): negative
          (4): solarize
          (5): sepia
          (6): posterize
          (7): aqua
  Get Color Effect Mode:
      gce
  Set Auto-Exposure Mode:
      ae:<val>
          (1): off
          (2): on
          (3): OnAutoFlash
          (4): OnAlwaysFlash
          (5): OnFlashRedEye
  Get Auto-Exposure Mode:
      gae
  Set Flash Mode:
      f:<val>
          (0): off
          (1): on
          (2): torch
          (3): auto
  Get Flash Mode:
      gf
  Set Flicker Detection and Avoidance Mode:
      fl:<val>
          (0): off
          (1): 50Hz
          (2): 60Hz
          (3): auto
  Get Flicker Detection and Avoidance Mode:
      gfl
  Set Contrast (0 to 1):
      ct:<val> e.g., ct:0.75
  Get Contrast:
      gct
  Set Saturation (0 to 2):
      st:<val> e.g., st:1.25
  Get Saturation:
      gst
  Set Exposure Time in seconds:
      ext:<val> e.g., ext:0.033
  Get Exposure Time:
      gext
  Set Auto Exposure Lock(0/1):
      ael:<val> e.g., ael:1
  Get Auto Exposure Lock:
      gael
  Set Edge Enhancement (0 to 1):
      ee:<val> e.g., ee:0.75
  Get Edge Enhancement:
      gee
  Set ROI for AE:
      It needs five values, ROI coordinates(top,left,bottom,right)
      and weight in that order
      aer:<val> e.g., aer:20 20 400 400 1.2
  Get ROI for AE:
      gaer
  Set ROI for AWB:
      It needs five values, ROI coordinates(top,left,bottom,right)
      and weight in that order
      wbr:<val> e.g., wbr:20 20 400 400 1.2
  Get ROI for AWB:
      gwbr
  Set FPS range:
      It needs two values, FPS Range (low, high) in that order
      fpsr:<val> e.g., fpsr:15 30
  Get FPS range:
      gfpsr
  Set WB Gains:
      It needs four values (R, GR, GB, B) in that order
      wbg:<val> e.g., wbg:1.2 2.2 0.8 1.6
  Get WB Gains:
      gwbg
  Set TNR Strength (0 to 1):
      ts:<val> e.g., ts:0.75
  Get TNR Strength:
      gts
  Set TNR Mode:
      tnr:<val>
          (0): NoiseReduction_Off
          (1): NoiseReduction_Fast
          (2): NoiseReduction_HighQuality
  Get TNR Mode:
      gtnr
  Capture: enter 'j' OR
           followed by a timer (e.g., jx5000, capture after 5 seconds) OR
           followed by multishot count (e.g., j:6, capture 6 images)
           timer/multihot values are optional, capture defaults to single shot with timer=0s
  Start Recording : enter '1'
  Stop Recording  : enter '0'
  Video snapshot  : enter '2' (While recording video)
  Set Preview Resolution:
      pcr:<val> e.g., pcr:3
          (2) : 640x480
          (3) : 1280x720
          (4) : 1920x1080
          (5) : 2104x1560
          (6) : 2592x1944
          (7) : 2616x1472
          (8) : 3840x2160
          (9) : 3896x2192
          (10): 4208x3120
          (11): 5632x3168
          (12): 5632x4224
  Note - For preview resolutions 4208x3120 and more use option --svs=nveglglessink
  Get Preview Resolution:
      gpcr
  Set Image Resolution:
      icr:<val> e.g., icr:3
          (2) : 640x480
          (3) : 1280x720
          (4) : 1920x1080
          (5) : 2104x1560
          (6) : 2592x1944
          (7) : 2616x1472
          (8) : 3840x2160
          (9) : 3896x2192
          (10): 4208x3120
          (11): 5632x3168
          (12): 5632x4224
  Get Image Capture Resolution:
      gicr
  Set Video Resolution:
      vcr:<val> e.g., vcr:3
          (2) : 640x480
          (3) : 1280x720
          (4) : 1920x1080
          (5) : 2104x1560
          (6) : 2592x1944
          (7) : 2616x1472
          (8) : 3840x2160
          (9) : 3896x2192
  Get Video Capture Resolution:
      gvcr


Runtime encoder configuration options:

  Set Encoding Bit-rate(in bytes):
      br:<val> e.g., br:4000000
  Get Encoding Bit-rate(in bytes):
      gbr
  Set Encoding Profile(only for H.264):
      ep:<val> e.g., ep:1
          (0): Baseline
          (1): Main
          (2): High
  Get Encoding Profile(only for H.264):
      gep
  Force IDR Frame on video Encoder(only for H.264):
      Enter 'f'


bitrate = 4000000
Encoder Profile = Baseline
Inside NvxLiteH264DecoderLowLatencyInitNvxLiteH264DecoderLowLatencyInit set DPB and MjstreamingInside NvxLiteH265DecoderLowLatencyInitNvxLiteH265DecoderLowLatencyInit set DPB and MjstreamingSocket read error. Camera Daemon stopped functioning.....
gst_nvcamera_open() failed ret=0

** (nvgstcapture-1.0:20753): CRITICAL **: <create_capture_pipeline:4407> can't set camera to playing


** (nvgstcapture-1.0:20753): CRITICAL **: <main:5195> Capture Pipeline creation failed
** Message: <main:5202> Capture completed
** Message: <main:5252> Camera application will now exit

The dmesg log for the same is as follows:

[70583.793941] mt9m021 6-0010: Starting stream
[70583.794020] mt9m021 6-0010: mt9m021_write: 0x10dc to 0x301a
[70583.805762] vi vi: vi2_channel_error_status:error 4022 frame 0
[70583.811956] (NULL device *): camera_common_dpd_enable: csi 0
[70583.811989] mt9m021 6-0010: mt9m021_s_stream
[70583.812010] mt9m021 6-0010: Ending stream
[70583.812035] mt9m021 6-0010: mt9m021_write: 0x00d8 to 0x301a
[70583.816936] (NULL device *): camera_common_dpd_enable: csi 0
[70583.816984] mt9m021 6-0010: mt9m021_set_power value: 0
[70583.817009] mt9m021 6-0010: mt9m021_power_off
[186317.267349] (NULL device *): camera_common_dpd_disable: csi 0
[186317.267360] mt9m021 6-0010: mt9m021_set_power value: 1
[186317.267366] mt9m021 6-0010: mt9m021_power_on
[186317.309584] mt9m021 6-0010: mt9m021_write: 0x00d9 to 0x301a
[186317.312559] mt9m021 6-0010: mt9m021_s_ctrl: V4L2_CID_GAIN
[186317.312688] mt9m021 6-0010: mt9m021_write: 0x0010 to 0x305e
[186317.313174] mt9m021 6-0010: mt9m021_write: 0x0010 to 0x30c4
[186317.313768] mt9m021 6-0010: mt9m021_s_ctrl: V4L2_CID_TEST_PATTERN
[186317.313851] mt9m021 6-0010: mt9m021_write: 0x0000 to 0x3070
[186317.314381] mt9m021 6-0010: mt9m021_write: 0x0000 to 0x3070
[186317.314889] mt9m021 6-0010: mt9m021_s_ctrl: V4L2_CID_GAIN_GREEN1
[186317.314972] mt9m021 6-0010: mt9m021_write: 0x0010 to 0x3056
[186317.315472] mt9m021 6-0010: mt9m021_write: 0x0010 to 0x30bc
[186317.317556] mt9m021 6-0010: mt9m021_s_ctrl: V4L2_CID_GAIN_RED
[186317.317651] mt9m021 6-0010: mt9m021_write: 0x0010 to 0x305a
[186317.318744] mt9m021 6-0010: mt9m021_write: 0x0010 to 0x30c0
[186317.319350] mt9m021 6-0010: mt9m021_s_ctrl: V4L2_CID_GAIN_BLUE
[186317.319443] mt9m021 6-0010: mt9m021_write: 0x0010 to 0x3058
[186317.320498] mt9m021 6-0010: mt9m021_write: 0x0010 to 0x30be
[186317.321091] mt9m021 6-0010: mt9m021_s_ctrl: V4L2_CID_GAIN_GREEN2
[186317.321182] mt9m021 6-0010: mt9m021_write: 0x0010 to 0x305c
[186317.321753] mt9m021 6-0010: mt9m021_write: 0x0010 to 0x30c2
[186317.322324] mt9m021 6-0010: mt9m021_s_ctrl: V4L2_CID_ANALOG_GAIN
[186317.322922] mt9m021 6-0010: mt9m021_read: 0x0080 from 0x30b0
[186317.323001] mt9m021 6-0010: mt9m021_write: 0x0080 to 0x30b0
[186317.323554] mt9m021 6-0010: mt9m021_s_ctrl: V4L2_CID_COARSE_TIME
[186317.323631] mt9m021 6-0010: mt9m021_write: 0x0380 to 0x3014
[186317.324178] mt9m021 6-0010: mt9m021_write: 0x0380 to 0x3018
[186317.324731] mt9m021 6-0010: mt9m021_s_ctrl: V4L2_CID_EXPOSURE_AUTO
[186317.324809] mt9m021 6-0010: mt9m021_set_autoexposure
[186317.325382] mt9m021 6-0010: mt9m021_read: 0x00d8 from 0x301a
[186317.325457] mt9m021 6-0010: mt9m021_is_streaming ? 0
[186317.326629] mt9m021 6-0010: mt9m021_write: 0x1802 to 0x3064
[186317.328436] mt9m021 6-0010: mt9m021_write: 0x0000 to 0x3100
[186317.328862] mt9m021 6-0010: mt9m021_s_ctrl: V4L2_CID_FLASH_LED_MODE
[186317.328903] mt9m021 6-0010: mt9m021_set_flash
[186317.328938] mt9m021 6-0010: mt9m021_write: 0x0180 to 0x3046
[186317.329326] mt9m021 6-0010: mt9m021_s_ctrl: V4L2_CID_HFLIP
[186317.329745] mt9m021 6-0010: mt9m021_read: 0x0000 from 0x3040
[186317.329787] mt9m021 6-0010: mt9m021_write: 0x0000 to 0x3040
[186317.330177] mt9m021 6-0010: mt9m021_s_ctrl: V4L2_CID_VFLIP
[186317.330600] mt9m021 6-0010: mt9m021_read: 0x0000 from 0x3040
[186317.330641] mt9m021 6-0010: mt9m021_write: 0x0000 to 0x3040
[186317.331037] mt9m021 6-0010: mt9m021_s_ctrl: V4L2_CID_FRAME_LENGTH
[186317.331078] mt9m021 6-0010: mt9m021_write: 0x0672 to 0x300c
[186317.332484] (NULL device *): camera_common_dpd_enable: csi 0
[186317.332554] mt9m021 6-0010: mt9m021_set_power value: 0
[186317.332594] mt9m021 6-0010: mt9m021_power_off
[186317.450435] nvcamera-daemon[20757]: unhandled level 2 translation fault (11) at 0x00000000, esr 0x92000006
[186317.450445] pgd = ffffffc0b1956000
[186317.453935] [00000000] *pgd=000000012e052003, *pmd=0000000000000000

[186317.460534] CPU: 0 PID: 20757 Comm: nvcamera-daemon Not tainted 3.10.96+ #49
[186317.460541] task: ffffffc0f3af0180 ti: ffffffc0a6a3c000 task.ti: ffffffc0a6a3c000
[186317.460549] PC is at 0x40322c
[186317.460554] LR is at 0x403228
[186317.460559] pc : [<000000000040322c>] lr : [<0000000000403228>] pstate: 60000000
[186317.460563] sp : 0000007fb28b94a0
[186317.460568] x29: 0000007fb28bd9d0 x28: 0000007fb28be1e0
[186317.460576] x27: 0000000000000001 x26: 0000000000000314
[186317.460584] x25: 0000007fb28bb510 x24: 0000007fb440d000
[186317.460590] x23: 0000007fb28b9520 x22: 0000000000000002
[186317.460597] x21: 0000007fb28ba510 x20: 0000000000000000
[186317.460603] x19: 0000007fb28bbb30 x18: 0000000000000014
[186317.460610] x17: 0000007fb43ecfb0 x16: 0000007fb4187488
[186317.460616] x15: 0000007fb4d84000 x14: 7265766972446172
[186317.460623] x13: 656d61432f697061 x12: 2f637273206d6f72
[186317.460630] x11: 6620676e69746167 x10: 61706f7270282020
[186317.460636] x9 : 3a726574656d6172 x8 : 0000000000000040
[186317.460643] x7 : 0000007facdc04f0 x6 : 0000000000000001
[186317.460649] x5 : 0000000000000000 x4 : 0000007fac000b10
[186317.460656] x3 : 0000000000000000 x2 : 0000000000000000
[186317.460662] x1 : 0000000000000000 x0 : 0000000000000000

[186317.460677] Library at 0x40322c: 0x400000 /usr/sbin/nvcamera-daemon
[186317.467191] Library at 0x403228: 0x400000 /usr/sbin/nvcamera-daemon
[186317.473669] vdso base = 0x7fb4d82000

I see that we have the same channel error in the dmesg log. Let me know if you have any suggestions for debug codes, etc.

I tried to log the function entries in csi.c and csi_fops.c. Also tried to force dev_dbg prints from these files. Here is the log during an attempt to stream using v4l2-ctl.
Command:

v4l2-ctl -d /dev/video0 --stream-mmap --stream-count=1 --stream-to=test.raw

dmesg log:

[ 1042.560246] vi vi: CSI DEBUG tegra_csi_power
[ 1042.564624] vi vi: CSI DEBUG tegra_csi_channel_power
[ 1042.569836] vi vi: CSI DEBUG clock_start
[ 1042.574335] mt9m021 6-0010: mt9m021_set_power value: 1
[ 1042.574355] mt9m021 6-0010: mt9m021_power_on
[ 1042.662901] vi vi: CSI DEBUG tegra_csi_start_streaming
[ 1042.668065] vi vi: CSI DEBUG csi2_start_streaming
[ 1042.672960] vi vi: csi2_write:port 0 offset 0x00000218 val:0x00000000
[ 1042.680622] csi2_pp_write:offset 0x0000001c val:0xffffffff
[ 1042.686122] csi2_cil_write:offset 0x00000010 val:0xffffffff
[ 1042.691743] csi2_cil_write:offset 0x00000014 val:0xffffffff
[ 1042.697311] csi2_cil_write:offset 0x0000000c val:0x00000000
[ 1042.704420] csi2_cil_write:offset 0x00000000 val:0x00000000
[ 1042.710073] csi2_cil_write:offset 0x00000008 val:0x0000004a
[ 1042.715642] vi vi: csi2_read:port 0 offset 0x000000d0
[ 1042.720719] csi2_cil_write:offset 0x00000000 val:0x00000000
[ 1042.726301] vi vi: csi2_write:port 0 offset 0x000000d0 val:0x00000001
[ 1042.732810] csi2_pp_write:offset 0x00000010 val:0x0000f007
[ 1042.738292] csi2_pp_write:offset 0x00000018 val:0x00000000
[ 1042.743963] csi2_pp_write:offset 0x00000004 val:0x2a0301f0
[ 1042.749634] csi2_pp_write:offset 0x00000008 val:0x00000011
[ 1042.755233] csi2_pp_write:offset 0x0000000c val:0x00140000
[ 1042.761603] csi2_pp_write:offset 0x00000014 val:0x00000000
[ 1042.767107] csi2_pp_write:offset 0x00000000 val:0x003f0001
[ 1042.772766] csi2_pp_write:offset 0x0000021c val:0x454340e1
[ 1042.778268] csi2_pp_write:offset 0x00000010 val:0x0000f005
[ 1042.784023] vi vi: CSI DEBUG tegra_csi_pad_control
[ 1042.788843] mt9m021 6-0010: mt9m021_s_stream
[ 1043.592755] mt9m021 6-0010: Starting stream
[ 1043.592796] mt9m021 6-0010: mt9m021_write: 0x10dc to 0x301a
[ 1043.614615] vi vi: CSI DEBUG tegra_csi_error
[ 1043.618942] vi vi: CSI DEBUG csi2_error
[ 1043.622846] csi2_pp_read:offset 0x0000001c
[ 1043.626991] csi2_pp_write:offset 0x0000001c val:0x00004014
[ 1043.632573] csi2_cil_read:offset 0x00000010
[ 1043.636788] csi2_cil_write:offset 0x00000010 val:0x00000002
[ 1043.642393] csi2_cil_read:offset 0x00000014
[ 1043.646604] csi2_cil_write:offset 0x00000014 val:0x00000020
[ 1043.652249] vi vi: vi2_channel_error_status:error 4022 frame 0
[ 1043.658108] vi vi: CSI DEBUG tegra_csi_pad_control
[ 1043.664551] vi vi: CSI DEBUG tegra_csi_error
[ 1043.668822] vi vi: CSI DEBUG csi2_error
[ 1043.672693] csi2_pp_read:offset 0x0000001c
[ 1043.676801] csi2_pp_write:offset 0x0000001c val:0x00004195
[ 1043.682293] csi2_cil_read:offset 0x00000010
[ 1043.686559] csi2_cil_write:offset 0x00000010 val:0x00000002
[ 1043.692148] csi2_cil_read:offset 0x00000014
[ 1043.696338] csi2_cil_write:offset 0x00000014 val:0x00000020
[ 1043.701922] vi vi: vi2_channel_error_status:error 4022 frame 1
[ 1043.707809] vi vi: CSI DEBUG tegra_csi_pad_control
[ 1043.730904] vi vi: CSI DEBUG tegra_csi_error
[ 1043.735245] vi vi: CSI DEBUG csi2_error
[ 1043.739119] csi2_pp_read:offset 0x0000001c
[ 1043.743364] csi2_pp_write:offset 0x0000001c val:0x00004095
[ 1043.748962] csi2_cil_read:offset 0x00000010
[ 1043.754888] csi2_cil_write:offset 0x00000010 val:0x00000002
[ 1043.760600] csi2_cil_read:offset 0x00000014
[ 1043.764986] csi2_cil_write:offset 0x00000014 val:0x00000020
[ 1043.771593] vi vi: vi2_channel_error_status:error 4022 frame 2
[ 1043.777492] vi vi: CSI DEBUG tegra_csi_pad_control
[ 1043.783796] vi vi: CSI DEBUG tegra_csi_error
[ 1043.788080] vi vi: CSI DEBUG csi2_error
[ 1043.792848] csi2_pp_read:offset 0x0000001c
[ 1043.797029] csi2_pp_write:offset 0x0000001c val:0x00004095
[ 1043.802574] csi2_cil_read:offset 0x00000010
[ 1043.806830] csi2_cil_write:offset 0x00000010 val:0x00000002
[ 1043.814104] csi2_cil_read:offset 0x00000014
[ 1043.818289] csi2_cil_write:offset 0x00000014 val:0x00000020
[ 1043.823873] vi vi: vi2_channel_error_status:error 4022 frame 3
[ 1046.811696] vi vi: CSI DEBUG tegra_csi_pad_control
[ 1046.818074] vi vi: CSI DEBUG tegra_csi_error
[ 1046.822410] vi vi: CSI DEBUG csi2_error
[ 1046.826244] csi2_pp_read:offset 0x0000001c
[ 1046.830382] csi2_pp_write:offset 0x0000001c val:0x00004095
[ 1046.835861] csi2_cil_read:offset 0x00000010
[ 1046.840110] csi2_cil_write:offset 0x00000010 val:0x00000002
[ 1046.845676] csi2_cil_read:offset 0x00000014
[ 1046.849902] csi2_cil_write:offset 0x00000014 val:0x00000020
[ 1046.855471] vi vi: vi2_channel_error_status:error 4022 frame 60
[ 1046.861507] vi vi: CSI DEBUG tegra_csi_stop_streaming
[ 1046.866555] vi vi: CSI DEBUG csi2_stop_streaming
[ 1046.871191] csi2_pp_write:offset 0x00000010 val:0x0000f002
[ 1046.876675] vi vi: CSI DEBUG tegra_csi_pad_control
[ 1046.881505] mt9m021 6-0010: mt9m021_s_stream
[ 1046.881512] mt9m021 6-0010: Ending stream
[ 1046.881518] mt9m021 6-0010: mt9m021_write: 0x00d8 to 0x301a
[ 1046.883658] vi vi: CSI DEBUG tegra_csi_channel_power
[ 1046.888645] mt9m021 6-0010: mt9m021_set_power value: 0
[ 1046.888652] mt9m021 6-0010: mt9m021_power_off
[ 1046.990091] vi vi: CSI DEBUG tegra_csi_power

hello EV,

according to your logs, seems you always got 0x4022 failure comes from csi side.
please double check the sensor driver, confirm you had correct settings of pixel parser and CIL configuration.

BTW, you could also refer to the csi2_error() function at kernel/drivers/media/platform/tegra/csi/csi2_fops.c to have more information. thanks

In the meanwhile when I verify the configuration, can you please let me know what channel error 0x22 means. We observe this in one of our other setups. Is it the same as 0x4022? How is it different?

Thanks
EV

hello EV,

you could refer to the Tegra X1 (SoC) Technical Reference Manual
http://developer.nvidia.com/embedded/dlc/tegra-x1-technical-reference-manual

share the CSI error reporting code snippet as below,
you could search the register name to understand the bit description.
thanks

val = csi2_pp_read(port, TEGRA_CSI_PIXEL_PARSER_STATUS);
        err |= val & 0x4000;
        csi2_pp_write(port, TEGRA_CSI_PIXEL_PARSER_STATUS, val);

        val = csi2_cil_read(port, TEGRA_CSI_CIL_STATUS);
        err |= val & 0x02;
        csi2_cil_write(port, TEGRA_CSI_CIL_STATUS, val);

        val = csi2_cil_read(port, TEGRA_CSI_CILX_STATUS);
        err |= val & 0x00020020;
        csi2_cil_write(port, TEGRA_CSI_CILX_STATUS, val);

Hi Jerry,
I will look into the manual to get more insight into what’s happening.

Anyhow, I tried changing some register writes to the MIPI bridge chip and changing the Pixel array dimension from 1280x720 to 1280x960 after which I observe that the error 0x4022 changed to 0x20022.
It seems like I fixed the pixel parser error, but still have CIL errors. I am not sure what parameters define the CIL configurations. It would be great if you could give me some guidance as to what kind of parameters I should be looking into.

While runnning v4l2 based streaming, I observe couple of syncpt timeouts as well, with a bit in pixel parser error set. Detailed logs below:
Attached: diff of debug code.
Running Yavta:

ubuntu@tegra-ubuntu:~$ cd debug/yavta/
ubuntu@tegra-ubuntu:~/debug/yavta$ ./yavta /dev/video0 -c1 -n1 -s1280x960 -fSRGGB12 -Fdata8.raw
Device /dev/video0 opened.
Device `vi-output-0, mt9m021 6-0010' on `platform:vi:0' (driver 'tegra-video') is a video capture (without mplanes) device.
Video format set: SRGGB12 (32314752) 1280x960 (stride 2560) field any buffer size 2457600
Video format: SRGGB12 (32314752) 1280x960 (stride 2560) field none buffer size 2457600
3 buffers requested.
length: 2457600 offset: 0 timestamp type/source: mono/EoF
Buffer 0/0 mapped at address 0x7f8b35e000.
length: 2457600 offset: 2457600 timestamp type/source: mono/EoF
Buffer 1/0 mapped at address 0x7f8b106000.
length: 2457600 offset: 4915200 timestamp type/source: mono/EoF
Buffer 2/0 mapped at address 0x7f8aeae000.
0 (0) [E] none 0 2457600 B 36.475063 36.506874 1.205 fps ts mono/EoF
Captured 1 frames in 0.861987 seconds (1.160110 fps, 2851086.806831 B/s).
3 buffers released.
ubuntu@tegra-ubuntu:~/debug/yavta$ dmesg

The relevant portions of dmesg:

[   36.464010] mt9m021 6-0010: Starting stream
[   36.464088] mt9m021 6-0010: mt9m021_write: 0x10dc to 0x301a
[   36.482537] vi vi: CSI DEBUG tegra_csi_error
[   36.486857] vi vi: CSI DEBUG csi2_error
[   36.491001] vi vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[   36.498212] vi vi: TEGRA_CSI_CIL_STATUS 0x00000002
[   36.503038] vi vi: TEGRA_CSI_CILX_STATUS 0x00020020
[   36.508124] vi vi: vi2_channel_error_status:error 20022 frame 0
[   36.514102] vi vi: CSI DEBUG tegra_csi_pad_control
[   36.520809] vi vi: CSI DEBUG tegra_csi_error
[   36.525103] vi vi: CSI DEBUG csi2_error
[   36.529147] vi vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[   36.534756] vi vi: TEGRA_CSI_CIL_STATUS 0x00000002
[   36.539644] vi vi: TEGRA_CSI_CILX_STATUS 0x00020020
[   36.544543] vi vi: vi2_channel_error_status:error 20022 frame 1
[   36.550680] vi vi: CSI DEBUG tegra_csi_stop_streaming
[   36.555737] vi vi: CSI DEBUG csi2_stop_streaming
[   36.560413] vi vi: CSI DEBUG tegra_csi_pad_control
[   36.565301] mt9m021 6-0010: mt9m021_s_stream
[   36.565309] mt9m021 6-0010: Ending stream
[   36.565316] mt9m021 6-0010: mt9m021_write: 0x00d8 to 0x301a
[   36.567710] vi vi: CSI DEBUG tegra_csi_channel_power
[   36.572909] mt9m021 6-0010: mt9m021_set_power value: 0
[   36.572917] mt9m021 6-0010: mt9m021_power_off
[   36.678274] vi vi: CSI DEBUG tegra_csi_power

Running v4l2 based streaming:

ubuntu@tegra-ubuntu:~/debug/yavta$ v4l2-ctl -d /dev/video0 -w --verbose --set-fmt-video=width=1280,height=960,pixelformat=RG12 --set-ctrl bypass_mode=0 --stream-mmap --stream-count=1 --stream-to=mydata.raw
VIDIOC_QUERYCAP: ok
VIDIOC_S_EXT_CTRLS: ok
VIDIOC_G_FMT: ok
VIDIOC_S_FMT: ok
Format Video Capture:
	Width/Height      : 1280/960
	Pixel Format      : 'RG12'
	Field             : None
	Bytes per Line    : 2560
	Size Image        : 2457600
	Colorspace        : sRGB
	Transfer Function : Default
	YCbCr Encoding    : Default
	Quantization      : Default
	Flags             : 
VIDIOC_REQBUFS: ok
VIDIOC_QUERYBUF: ok
VIDIOC_QBUF: ok
VIDIOC_QUERYBUF: ok
VIDIOC_QBUF: ok
VIDIOC_QUERYBUF: ok
VIDIOC_QBUF: ok
VIDIOC_QUERYBUF: ok
VIDIOC_QBUF: ok
VIDIOC_STREAMON: ok
	Index    : 0
	Type     : Video Capture
	Flags    : mapped, done, error
	Field    : None
	Sequence : 0
	Length   : 2457600
	Bytesused: 2457600
	Timestamp: 383.854600s (Monotonic, End-of-Frame)

	Index    : 1
	Type     : Video Capture
	Flags    : mapped, done, error
	Field    : None
	Sequence : 1
	Length   : 2457600
	Bytesused: 2457600
	Timestamp: 383.891743s (Monotonic, End-of-Frame)

	Index    : 2
	Type     : Video Capture
	Flags    : mapped, done, error
	Field    : None
	Sequence : 2
	Length   : 2457600
	Bytesused: 2457600
	Timestamp: 18446743798852079600.18446744073434680968s (Monotonic, End-of-Frame)

Dmesg shows syncpt timeout errors as well:

[  383.862040] vi vi: CSI DEBUG tegra_csi_error
[  383.866365] vi vi: CSI DEBUG csi2_error
[  383.870291] vi vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[  383.876144] vi vi: TEGRA_CSI_CIL_STATUS 0x00000002
[  383.880996] vi vi: TEGRA_CSI_CILX_STATUS 0x00020020
[  383.886047] vi vi: vi2_channel_error_status:error 20022 frame 0
[  383.892480] vi vi: CSI DEBUG tegra_csi_pad_control
[  383.899063] vi vi: CSI DEBUG tegra_csi_error
[  383.903334] vi vi: CSI DEBUG csi2_error
[  383.907171] vi vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[  383.912768] vi vi: TEGRA_CSI_CIL_STATUS 0x00000002
[  383.917647] vi vi: TEGRA_CSI_CILX_STATUS 0x00020020
[  383.922524] vi vi: vi2_channel_error_status:error 20022 frame 1
[  383.928544] vi vi: CSI DEBUG tegra_csi_pad_control
[  384.128222] video4linux video0: frame start syncpt timeout!0
[  384.134041] vi vi: CSI DEBUG tegra_csi_pad_control
[  384.139775] vi vi: CSI DEBUG tegra_csi_status
[  384.144247] vi vi: CSI DEBUG csi2_status
[  384.149084] vi vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000100
[  384.154697] vi vi: TEGRA_CSI_CIL_STATUS 0x00000002
[  384.159544] vi vi: TEGRA_CSI_CILX_STATUS 0x00020020
[  384.164424] vi vi: TEGRA_CSI_DEBUG_COUNTER_0 0x00001100
[  384.169705] vi vi: TEGRA_CSI_DEBUG_COUNTER_1 0x00000004
[  384.174927] vi vi: TEGRA_CSI_DEBUG_COUNTER_2 0x000082ff
[  384.180190] vi vi: CSI DEBUG tegra_csi_error_recover
[  384.185147] vi vi: CSI DEBUG csi2_error_recover
[  384.189774] vi vi: CSI DEBUG tegra_csi_stop_streaming
[  384.194820] vi vi: CSI DEBUG csi2_stop_streaming
[  384.199482] vi vi: CSI DEBUG tegra_csi_start_streaming
[  384.204616] vi vi: CSI DEBUG csi2_start_streaming
[  384.209367] vi vi: csi2_read:port 0 offset 0x000000d0
[  384.214570] vi vi: CSI DEBUG tegra_csi_pad_control
[  384.227182] vi vi: CSI DEBUG tegra_csi_error
[  384.231496] vi vi: CSI DEBUG csi2_error
[  384.235336] vi vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[  384.240939] vi vi: TEGRA_CSI_CIL_STATUS 0x00000012
[  384.245783] vi vi: TEGRA_CSI_CILX_STATUS 0x00060060
[  384.250706] vi vi: vi2_channel_error_status:error 20022 frame 3

Hi Jerry,

Do you have any suggestions as to how we can fix this issue. I couldn’t get rid of this error yet.

hello EV,

this should be my guessing, which CSI port you had connected to?
had you try to enable the corresponding dpd I/O pads ?
thanks

Hi Jerry,

Thank you for the prompt response.
I am currently using CSI port A. The buffer chip is configured to communicate using 2-lanes.
I haven’t tried enabling the dpd I/O pads. Do you have any reference on how I can check whether they are already enabled/or about how I can enable them?

Thanks for the support!

hello EV,

sorry, the information was not correct. only TK1 need to enable dpd i/o pads manually.
BTW, since you’re developing the MIPI bridge driver.
i would suggest you refer to Toshiba UH2C/D HDMI-CSI bridge driver as below path. thanks

$TOP/kernel/drivers/media/i2c/tc358840.c

Hi Jerry,

I had actually gone through their implementation while trying to debug this issue.
The sequence to configure the MIPI bridge is already available with me, which I program into the chip before enabling the stream.
The setup is similar to the one discussed here https://devtalk.nvidia.com/default/topic/993852/mt9m021-streaming/ except that he has a buffer chip between the TX1 and MIPI bridge. The interesting thing is he was able to stream using his code, while on out setup we couldn’t reproduce this result(well, the buffer chip isn’t present in ours).

I am not sure how having a buffer chip makes the difference. In addition, I would like to know whether there is a method which allows to dump whatever comes into the CSI port so that we can debug.

hello EV,

is it possible for you to generate the test pattern from the bridge?
also, could you help to measure the hardware signal to confirm the status?
thanks

The bridge chip doesn’t have any inbuilt test pattern generation capability as far as I know. We measured the hardware signals and see signal on the MIPI lanes while running yavta. Is there any specific streaming command which you like to suggest?

hello EV,

both yavta and v4l2-ctl would be useful tools to confirm the raw dump.
could you help check the CSI_PHY_CIL_COMMAND_0 register value while running this tools. please refer to the attachment.
you should able to use 3rdparty tool (devmem2) to read the register value.
thanks

I tried to read the CSI_PHY_CIL_COMMAND_0 register while running v4l2-ctl and here is the output.
Please check whether I am reading the right register. I found the CSI base address to be 0x54080000 and used the word offset 0x908 to read the register.

ubuntu@tegra-ubuntu:~/debug/devmem2$ sudo ./devmem2 0x54080908
/dev/mem opened.
Memory mapped at address 0x7f97840000.
Value at address 0x1409812744 (0x7f97840908): 0x1

hello EV,

seems your CSI_A_PHY_CIL was enabled correctly.
next step, could you please check the register value of CSI_CSI_CILA_STATUS_0.
attach the register description for your reference. thanks

CSI_CILA_STATUS.jpg