I am trying to design a PCB board for two Xavier boards’ PCIe*8 communication based on the design in the document, NVIDIA JETSON AGX XAVIER PCIe ENDPOINT DESIGN GUIDELINES(attached to this post). I am a bit confused about the part connected to PEX CTRL as shown below.
- what is OD in the above figure? Why we need it?
- I am new to PCIe. I didn’t find a lot of information about PEX ctrl. Even not sure what it stands for. May I ask how this PEX ctrl works with PCIe*8 communication?
Jetson_AGX_Xavier_PCIe_Endpoint_Design_Guidelines.pdf (1.9 MB)