WM8904 config

Add the following items to the device tree

/{
    fixed-regulators{
     wm8904-audio:regulator@66{
    compatible = "regulator-fixed";
    reg = <66>;
    regulator-name = "wm8904-supply";
};
};
};

wm8904@1a{
DCVDD-supply = <&wm8904-audio>;
DBVDD-supply = <&wm8904-audio>;
AVDD-supply = <&wm8904-audio>;
CPVDD-supply = <&wm8904-audio>;
MICVDD-supply = <&wm8904-audio>;
}

@Yolomei ,Dear Yolomei ,hi,I feel like I’m about to get it done, now the kernel is printing new errors, can I help take a look?


Here is my modification of the tegra194-audio-p2822-0000.dtsi file,
Really thank you very much, I can’t get it without your help, really appreciated

// SPDX-License-Identifier: GPL-2.0-only
/*
 * T194 p2822-0000 audio common DTSI file.
 *
 * Copyright (c) 2017-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 *
 */

#include <audio/tegra-platforms-audio-dai-links.dtsi>
#include <audio/tegra186-audio-dai-links.dtsi>
#include <audio/tegra186-audio-graph.dtsi>
#include <dt-bindings/gpio/tegra194-gpio.h>
#include <dt-bindings/audio/tegra194-audio.h>
#include <audio/tegra-platforms-audio-dmic3-5-switch.dtsi>
/ {

	aconnect@2a41000 {
		status = "okay";

		agic-controller@2a41000 {
			status = "okay";
		};

		adsp@2993000 {
			status = "okay";
		};
	};
	// //add
	clocks {
		wm8904_mclk: wm8904_mclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		// clock-frequency = <49152000>;
		clock-frequency = <12288000>;
		clock-output-names = "wm8904-mclk";
		status = "okay";
		};
	};
	// fixed-regulators {
	// 	wm8904-audio:regulator@66{
	// 		compatible = "regulator-fixed";
	// 		reg = <66>;
	// 		regulator-name = "wm8904-supply";
	// 	};
	// };

	i2c@c250000 {
		//add
		wm8904_codec: wm8904@1a {
			compatible = "wlf,wm8904";
			status ="okay";
			reg = <0x1a>;

			#sound-dai-cells = <1>;
			sound-name-prefix = "WM";
			// clocks = <&wm8904_mclk>;
			// clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;
			clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
			clock-names = "mclk";
			// DCVDD-supply = <&wm8904-audio>;
			// DBVDD-supply = <&wm8904-audio>;
			// AVDD-supply = <&wm8904-audio>;
			// CPVDD-supply = <&wm8904-audio>;
			// MICVDD-supply = <&wm8904-audio>;
			port {
				wm8904_ep: endpoint {
					remote-endpoint = <&i2s1_dap_ep>;
					mclk-fs = <256>;
					link-name = "wm8904-playback";
				};
			};
		};
	};

	/* Default for all I2S is long fsync width(31) */
	aconnect@2a41000 {
		// compatible = "nvidia,tegra210-aconnect";
    	// status = "okay";
		ahub {
			/* I2S4 in Short frame sync for BT SCO */
			i2s@2901300 {
				bclk-ratio = <4>;
				status = "okay";
			};
		};

	};

	tegra_acsl_audio: acsl_audio {
		status = "okay";
	};

	hda@3510000 {
		status = "okay";

		nvidia,model = "NVIDIA Jetson AGX Xavier HDA";
	};

	tegra_sound: sound {
		status = "okay";
		compatible = "nvidia,tegra186-ape";
		nvidia-audio-card,name = "NVIDIA Jetson AGX Xavier APE";
		// nvidia,model = "NVIDIA Jetson AGX Xavier APE";
		// nvidia,num-codec-link = <1>;
		// nvidia,num-clk = <6>;
		// nvidia,clk-rates = < 270950400  /* PLLA_x11025_RATE */
		// 						11289600   /* AUD_MCLK_x11025_RATE */
		// 						45158400   /* PLLA_OUT0_x11025_RATE */
		// 						45158400   /* AHUB_x11025_RATE */
		// 						245760000  /* PLLA_x8000_RATE */
		// 						12288000   /* AUD_MCLK_x8000_RATE */
		// 						49152000   /* PLLA_OUT0_x8000_RATE */
		// 						49152000 >;/* AHUB_x8000_RATE */
		// nvidia,xbar = <&tegra_axbar>;
		clocks = <&bpmp_clks TEGRA194_CLK_PLLA>,
			 <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>,
			 <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		clock-names = "pll_a", "pll_a_out0", "extern1";
		assigned-clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;
		// nvidia-audio-card,widgets =
		// 	"Headphone",	"WM Headphone Jack",
		// 	"Microphone",	"WM Mic Jack",
		// 	"Speaker",	"WM Int Spk",
		// 	"Microphone",	"WM Int Mic";

		// nvidia-audio-card,routing =
		// 	"WM Headphone Jack",     "WM HPO L Playback",
		// 	"WM Headphone Jack",     "WM HPO R Playback",
		// 	"WM IN1P",		     "WM Mic Jack",
		// 	"WM IN2P",		     "WM Mic Jack",
		// 	"WM Int Spk",	     "WM SPO Playback",
		// 	"WM DMIC L1",	     "WM Int Mic",
		// 	"WM DMIC L2",	     "WM Int Mic",
		// 	"WM DMIC R1",	     "WM Int Mic",
		// 	"WM DMIC R2",	     "WM Int Mic";
		nvidia-audio-card,widgets =
		    "Headphone",    "WM Headphone Jack",
			"Microphone",   "WM Mic",
			"Line",         "WM Line In Jack",
			"Line",         "WM Line In Jack",
			"Microphone",	"WM MICBIAS",
			  "Microphone", "WM Mic Jack",
			  "Speaker",	"WM Int Spk",
			  "Microphone", "WM Int Mic";
		//add
		nvidia-audio-card,routing =		
			"WM IN2L", "WM Line In Jack",			
			"WM IN2R", "WM Line In Jack",		
			"WM Mic", "WM MICBIAS",			
			"WM IN1L", "WM Mic",
			"WM Headphone Jack", "WM HPOUTL",
    		"WM Headphone Jack", "WM HPOUTR";
		nvidia-audio-card,mclk-fs = <256>;
		//  nvidia-audio-card,dai-link@1{
        //             link-name = "wm8904-playback";
        //             cpu-dai = <&tegra_i2s1>;
        //             codec-dai = <&wm8904_codec>;
        //             cpu-dai-name = "I2S1";
        //             codec-dai-name = "wm8904-hifi";
        //             format = "i2s";
        //             bitclock-slave;
        //             frame-slave;
        //             bitclock-noninversion;
        //             frame-noninversion;
        //             bit-format = "s16_le";
        //             bclk_ratio = <0>;
        //             srate = <48000>;
        //             num-channel = <2>;
        //             ignore_suspend;
        //             name-prefix = "WM";
        //             status = "okay";
        //     };
		

	};

	tegra_sound_graph: sound_graph {
		compatible = "nvidia,tegra186-audio-graph-card";

		/*
		 * Tegra audio graph card is based on uptream generic audio
		 * graph sound card. In future there is plan to use this
		 * as default sound card.
		 */
		status = "disabled";

		dais = /* ADMAIF (FE) Ports */
		       <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>,
		       <&admaif7_port>, <&admaif8_port>, <&admaif9_port>,
		       <&admaif10_port>, <&admaif11_port>, <&admaif12_port>,
		       <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
		       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>,
		       <&admaif19_port>, <&admaif20_port>,

		       /* ADSP (FE) Ports */
		       <&adsp_pcm1_port>, <&adsp_pcm2_port>,
		       <&adsp_compr1_port>, <&adsp_compr2_port>,

		       /* XBAR I/O ports */
		       <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>,
		       <&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_i2s6_port>,

		       <&xbar_dmic1_port>, <&xbar_dmic2_port>,
		       <&xbar_dmic3_port>, <&xbar_dmic4_port>,

		       <&xbar_dspk1_port>, <&xbar_dspk2_port>,

		       /* XBAR HW accelerator ports */
		       <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
		       <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,

		       <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,

		       <&xbar_afc1_in_port>, <&xbar_afc2_in_port>,
		       <&xbar_afc3_in_port>, <&xbar_afc4_in_port>,
		       <&xbar_afc5_in_port>, <&xbar_afc6_in_port>,

		       <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
		       <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
		       <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
		       <&xbar_asrc_in7_port>, <&xbar_arad_port>,

		       <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
		       <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
		       <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
		       <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
		       <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,

		       <&xbar_ope1_in_port>,

		       <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
		       <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
		       <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
		       <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
		       <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
		       <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
		       <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
		       <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,

		       <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
		       <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,

		       /* BE I/O Ports */
		       <&i2s1_port>, <&i2s2_port>, <&i2s3_port>,
		       <&i2s4_port>, <&i2s5_port>, <&i2s6_port>,

		       <&dmic1_port>, <&dmic2_port>, <&dmic3_port>,
		       <&dmic4_port>,

		       <&dspk1_port>, <&dspk2_port>,

		       /* BE HW accelerator ports */
		       <&sfc1_out_port>, <&sfc2_out_port>,
		       <&sfc3_out_port>, <&sfc4_out_port>,

		       <&mvc1_out_port>, <&mvc2_out_port>,

		       <&afc1_out_port>, <&afc2_out_port>,
		       <&afc3_out_port>, <&afc4_out_port>,
		       <&afc5_out_port>, <&afc6_out_port>,

		       <&asrc_out1_port>, <&asrc_out2_port>,
		       <&asrc_out3_port>, <&asrc_out4_port>,
		       <&asrc_out5_port>, <&asrc_out6_port>,

		       <&mixer_out1_port>, <&mixer_out2_port>,
		       <&mixer_out3_port>, <&mixer_out4_port>,
		       <&mixer_out5_port>,

		       <&ope1_out_port>,

		       <&amx1_out_port>, <&amx2_out_port>,
		       <&amx3_out_port>, <&amx4_out_port>,

		       <&adx1_out1_port>, <&adx1_out2_port>,
		       <&adx1_out3_port>, <&adx1_out4_port>,
		       <&adx2_out1_port>, <&adx2_out2_port>,
		       <&adx2_out3_port>, <&adx2_out4_port>,
		       <&adx3_out1_port>, <&adx3_out2_port>,
		       <&adx3_out3_port>, <&adx3_out4_port>,
		       <&adx4_out1_port>, <&adx4_out2_port>,
		       <&adx4_out3_port>, <&adx4_out4_port>,

		       /* ADSP related ports */
		       <&adsp_admaif1_port>, <&adsp_admaif2_port>,
		       <&adsp_admaif3_port>, <&adsp_admaif4_port>,
		       <&adsp_admaif5_port>, <&adsp_admaif6_port>,
		       <&adsp_admaif7_port>, <&adsp_admaif8_port>,
		       <&adsp_admaif9_port>, <&adsp_admaif10_port>,
		       <&adsp_admaif11_port>, <&adsp_admaif12_port>,
		       <&adsp_admaif13_port>, <&adsp_admaif14_port>,
		       <&adsp_admaif15_port>, <&adsp_admaif16_port>,
		       <&adsp_admaif17_port>, <&adsp_admaif18_port>,
		       <&adsp_admaif19_port>, <&adsp_admaif20_port>,

		       <&admaif1_codec_port>, <&admaif2_codec_port>,
		       <&admaif3_codec_port>, <&admaif4_codec_port>,
		       <&admaif5_codec_port>, <&admaif6_codec_port>,
		       <&admaif7_codec_port>, <&admaif8_codec_port>,
		       <&admaif9_codec_port>, <&admaif10_codec_port>,
		       <&admaif11_codec_port>, <&admaif12_codec_port>,
		       <&admaif13_codec_port>, <&admaif14_codec_port>,
		       <&admaif15_codec_port>, <&admaif16_codec_port>,
		       <&admaif17_codec_port>, <&admaif18_codec_port>,
		       <&admaif19_codec_port>, <&admaif20_codec_port>;

		label = "NVIDIA Jetson AGX Xavier APE";

		clocks = <&bpmp_clks TEGRA194_CLK_PLLA>,
			 <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;
		clock-names = "pll_a", "plla_out0";
		assigned-clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;

		widgets = "Headphone",	"WM Headphone Jack",
			  "Microphone", "WM Mic Jack",
			  "Speaker",	"WM Int Spk",
			  "Microphone", "WM Int Mic";

		routing = "WM Headphone Jack", "WM HPO L Playback",
			  "WM Headphone Jack", "WM HPO R Playback",
			  "WM IN1P",	   "WM Mic Jack",
			  "WM IN2P",	   "WM Mic Jack",
			  "WM Int Spk",	   "WM SPO Playback",
			  "WM DMIC L1",	   "WM Int Mic",
			  "WM DMIC L2",	   "WM Int Mic",
			  "WM DMIC R1",	   "WM Int Mic",
			  "WM DMIC R2",	   "WM Int Mic";

		/*
		 * For codec2codec based DAI link design this is required.
		 * For DPCM based design, this is optional and instead
		 * it will be picked from codec port node.
		 */
		mclk-fs = <256>;
	};
};

/*
 * Default config for all I2S dai links are
 * format = "i2s", bitclock-slave, frame-slave,
 * bitclock-noninversion, frame-noninversion,
 * Any change from default needs override on
 * platform specific files.
 */

/* Override with Codec entries */
&i2s1_to_codec {
	link-name = "wm8904-playback";
	// link-name = "rt5658-playback";
	bitclock-master;
    frame-master;
	codec {
		sound-dai = <&wm8904_codec 0>;
		prefix = "WM";
	};
};

hdr40_snd_link_i2s: &i2s2_to_codec { };

/* Override with BT SCO entries */
&i2s4_to_codec {
	format = "dsp_a";
	bitclock-inversion;
};

/* Audio graph related bindings */
&i2s1_dap_ep {
	remote-endpoint = <&wm8904_ep>;
};

&i2s4_dap_ep {
	dai-format = "dsp_a";
	bitclock-inversion;
};

hdr40_snd_i2s_dap_ep: &i2s2_dap_ep { };

Have you tried this “* VDD” alarm solution?

Hello,I tried increasing the arguments you said, but the compilation error.

Hello,I open the video on the display website and I can hear the sound playing, but the kernel still shows some error messages, I’m not sure if it will have an impact? Thank you very much for your previous help.

Not to add, but to replace these files.
I also have an warning now, which will not affect the use.

// SPDX-License-Identifier: GPL-2.0-only
/*
 * T194 p2822-0000 audio common DTSI file.
 *
 * Copyright (c) 2017-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 *
 */

#include <audio/tegra-platforms-audio-dai-links.dtsi>
#include <audio/tegra186-audio-dai-links.dtsi>
#include <audio/tegra186-audio-graph.dtsi>
#include <dt-bindings/gpio/tegra194-gpio.h>
#include <dt-bindings/audio/tegra194-audio.h>
#include <audio/tegra-platforms-audio-dmic3-5-switch.dtsi>
#include <t19x-common-platforms/tegra194-platforms-simple-bus.dtsi>

/ {

	aconnect@2a41000 {
		status = "okay";

		agic-controller@2a41000 {
			status = "okay";
		};

		adsp@2993000 {
			status = "okay";
		};
	};
	// //add
	clocks {
		wm8904_mclk: wm8904_mclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		// clock-frequency = <49152000>;
		clock-frequency = <12288000>;
		clock-output-names = "wm8904-mclk";
		status = "okay";
		};
	};
	// fixed-regulators {
	// 	wm8904-audio:regulator@66{
	// 		compatible = "regulator-fixed";
	// 		reg = <66>;
	// 		regulator-name = "wm8904-supply";
	// 	};
	// };

	i2c@c250000 {
		//add
		wm8904_codec: wm8904@1a {
			compatible = "wlf,wm8904";
			status ="okay";
			reg = <0x1a>;

			#sound-dai-cells = <1>;
			sound-name-prefix = "WM";
			// clocks = <&wm8904_mclk>;
			// clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;
			clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
			clock-names = "mclk";
			// DCVDD-supply = <&wm8904-audio>;
			// DBVDD-supply = <&wm8904-audio>;
			// AVDD-supply = <&wm8904-audio>;
			// CPVDD-supply = <&wm8904-audio>;
			// MICVDD-supply = <&wm8904-audio>;
			port {
				wm8904_ep: endpoint {
					remote-endpoint = <&i2s1_dap_ep>;
					mclk-fs = <256>;
					link-name = "wm8904-playback";
				};
			};
		};
	};

	/* Default for all I2S is long fsync width(31) */
	aconnect@2a41000 {
		// compatible = "nvidia,tegra210-aconnect";
    	// status = "okay";
		ahub {
			/* I2S4 in Short frame sync for BT SCO */
			i2s@2901300 {
				bclk-ratio = <4>;
				status = "okay";
			};
		};

	};

	tegra_acsl_audio: acsl_audio {
		status = "okay";
	};

	hda@3510000 {
		status = "okay";

		nvidia,model = "NVIDIA Jetson AGX Xavier HDA";
	};

	tegra_sound: sound {
		status = "okay";
		compatible = "nvidia,tegra186-ape";
		nvidia-audio-card,name = "NVIDIA Jetson AGX Xavier APE";
		clocks = <&bpmp_clks TEGRA194_CLK_PLLA>,
			 <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>,
			 <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		clock-names = "pll_a", "pll_a_out0", "extern1";
		assigned-clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;
		nvidia-audio-card,widgets =
		    "Headphone",    "WM Headphone Jack",
			"Microphone",   "WM Mic",
			"Line",         "WM Line In Jack",
			"Line",         "WM Line In Jack",
			"Microphone",	"WM MICBIAS",
			  "Microphone", "WM Mic Jack",
			  "Speaker",	"WM Int Spk",
			  "Microphone", "WM Int Mic";
		//add
		nvidia-audio-card,routing =		
			"WM IN2L", "WM Line In Jack",			
			"WM IN2R", "WM Line In Jack",		
			"WM Mic", "WM MICBIAS",			
			"WM IN1L", "WM Mic",
			"WM Headphone Jack", "WM HPOUTL",
    		"WM Headphone Jack", "WM HPOUTR";
		nvidia-audio-card,mclk-fs = <256>;

	};

	tegra_sound_graph: sound_graph {
		compatible = "nvidia,tegra186-audio-graph-card";

		/*
		 * Tegra audio graph card is based on uptream generic audio
		 * graph sound card. In future there is plan to use this
		 * as default sound card.
		 */
		status = "disabled";

		dais = /* ADMAIF (FE) Ports */
		       <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>,
		       <&admaif7_port>, <&admaif8_port>, <&admaif9_port>,
		       <&admaif10_port>, <&admaif11_port>, <&admaif12_port>,
		       <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
		       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>,
		       <&admaif19_port>, <&admaif20_port>,

		       /* ADSP (FE) Ports */
		       <&adsp_pcm1_port>, <&adsp_pcm2_port>,
		       <&adsp_compr1_port>, <&adsp_compr2_port>,

		       /* XBAR I/O ports */
		       <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>,
		       <&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_i2s6_port>,

		       <&xbar_dmic1_port>, <&xbar_dmic2_port>,
		       <&xbar_dmic3_port>, <&xbar_dmic4_port>,

		       <&xbar_dspk1_port>, <&xbar_dspk2_port>,

		       /* XBAR HW accelerator ports */
		       <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
		       <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,

		       <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,

		       <&xbar_afc1_in_port>, <&xbar_afc2_in_port>,
		       <&xbar_afc3_in_port>, <&xbar_afc4_in_port>,
		       <&xbar_afc5_in_port>, <&xbar_afc6_in_port>,

		       <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
		       <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
		       <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
		       <&xbar_asrc_in7_port>, <&xbar_arad_port>,

		       <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
		       <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
		       <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
		       <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
		       <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,

		       <&xbar_ope1_in_port>,

		       <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
		       <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
		       <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
		       <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
		       <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
		       <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
		       <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
		       <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,

		       <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
		       <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,

		       /* BE I/O Ports */
		       <&i2s1_port>, <&i2s2_port>, <&i2s3_port>,
		       <&i2s4_port>, <&i2s5_port>, <&i2s6_port>,

		       <&dmic1_port>, <&dmic2_port>, <&dmic3_port>,
		       <&dmic4_port>,

		       <&dspk1_port>, <&dspk2_port>,

		       /* BE HW accelerator ports */
		       <&sfc1_out_port>, <&sfc2_out_port>,
		       <&sfc3_out_port>, <&sfc4_out_port>,

		       <&mvc1_out_port>, <&mvc2_out_port>,

		       <&afc1_out_port>, <&afc2_out_port>,
		       <&afc3_out_port>, <&afc4_out_port>,
		       <&afc5_out_port>, <&afc6_out_port>,

		       <&asrc_out1_port>, <&asrc_out2_port>,
		       <&asrc_out3_port>, <&asrc_out4_port>,
		       <&asrc_out5_port>, <&asrc_out6_port>,

		       <&mixer_out1_port>, <&mixer_out2_port>,
		       <&mixer_out3_port>, <&mixer_out4_port>,
		       <&mixer_out5_port>,

		       <&ope1_out_port>,

		       <&amx1_out_port>, <&amx2_out_port>,
		       <&amx3_out_port>, <&amx4_out_port>,

		       <&adx1_out1_port>, <&adx1_out2_port>,
		       <&adx1_out3_port>, <&adx1_out4_port>,
		       <&adx2_out1_port>, <&adx2_out2_port>,
		       <&adx2_out3_port>, <&adx2_out4_port>,
		       <&adx3_out1_port>, <&adx3_out2_port>,
		       <&adx3_out3_port>, <&adx3_out4_port>,
		       <&adx4_out1_port>, <&adx4_out2_port>,
		       <&adx4_out3_port>, <&adx4_out4_port>,

		       /* ADSP related ports */
		       <&adsp_admaif1_port>, <&adsp_admaif2_port>,
		       <&adsp_admaif3_port>, <&adsp_admaif4_port>,
		       <&adsp_admaif5_port>, <&adsp_admaif6_port>,
		       <&adsp_admaif7_port>, <&adsp_admaif8_port>,
		       <&adsp_admaif9_port>, <&adsp_admaif10_port>,
		       <&adsp_admaif11_port>, <&adsp_admaif12_port>,
		       <&adsp_admaif13_port>, <&adsp_admaif14_port>,
		       <&adsp_admaif15_port>, <&adsp_admaif16_port>,
		       <&adsp_admaif17_port>, <&adsp_admaif18_port>,
		       <&adsp_admaif19_port>, <&adsp_admaif20_port>,

		       <&admaif1_codec_port>, <&admaif2_codec_port>,
		       <&admaif3_codec_port>, <&admaif4_codec_port>,
		       <&admaif5_codec_port>, <&admaif6_codec_port>,
		       <&admaif7_codec_port>, <&admaif8_codec_port>,
		       <&admaif9_codec_port>, <&admaif10_codec_port>,
		       <&admaif11_codec_port>, <&admaif12_codec_port>,
		       <&admaif13_codec_port>, <&admaif14_codec_port>,
		       <&admaif15_codec_port>, <&admaif16_codec_port>,
		       <&admaif17_codec_port>, <&admaif18_codec_port>,
		       <&admaif19_codec_port>, <&admaif20_codec_port>;

		label = "NVIDIA Jetson AGX Xavier APE";

		clocks = <&bpmp_clks TEGRA194_CLK_PLLA>,
			 <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;
		clock-names = "pll_a", "plla_out0";
		assigned-clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;

		widgets = "Headphone",	"WM Headphone Jack",
			  "Microphone", "WM Mic Jack",
			  "Speaker",	"WM Int Spk",
			  "Microphone", "WM Int Mic";

		routing = "WM Headphone Jack", "WM HPO L Playback",
			  "WM Headphone Jack", "WM HPO R Playback",
			  "WM IN1P",	   "WM Mic Jack",
			  "WM IN2P",	   "WM Mic Jack",
			  "WM Int Spk",	   "WM SPO Playback",
			  "WM DMIC L1",	   "WM Int Mic",
			  "WM DMIC L2",	   "WM Int Mic",
			  "WM DMIC R1",	   "WM Int Mic",
			  "WM DMIC R2",	   "WM Int Mic";

		/*
		 * For codec2codec based DAI link design this is required.
		 * For DPCM based design, this is optional and instead
		 * it will be picked from codec port node.
		 */
		mclk-fs = <256>;
	};
};

/*
 * Default config for all I2S dai links are
 * format = "i2s", bitclock-slave, frame-slave,
 * bitclock-noninversion, frame-noninversion,
 * Any change from default needs override on
 * platform specific files.
 */

/* Override with Codec entries */
&i2s1_to_codec {
	link-name = "wm8904-playback";
	// link-name = "rt5658-playback";
	bitclock-master;
    frame-master;
	codec {
		sound-dai = <&wm8904_codec 0>;
		prefix = "WM";
	};
};

hdr40_snd_link_i2s: &i2s2_to_codec { };

/* Override with BT SCO entries */
&i2s4_to_codec {
	format = "dsp_a";
	bitclock-inversion;
};

/* Audio graph related bindings */
&i2s1_dap_ep {
	remote-endpoint = <&wm8904_ep>;
};

&i2s4_dap_ep {
	dai-format = "dsp_a";
	bitclock-inversion;
};

hdr40_snd_i2s_dap_ep: &i2s2_dap_ep { };

This is my current device tree configuration


This is the dmesg log
I added the clock configuration in the following file,
./kernel/kernel-5.10/sound/soc/tegra/tegra_codecs.c

static int tegra_machine_wm8904_init(struct snd_soc_pcm_runtime *rtd)
{
	struct device *dev = rtd->card->dev;
	int err;

	err = snd_soc_dai_set_sysclk(rtd->dais[rtd->num_cpus], WM8904_CLK_AUTO,
				     12288000, SND_SOC_CLOCK_IN);
	if (err) {
		dev_err(dev, "failed to set wm8904 sysclk!\n");
		return err;
	}
	dev_info(dev, "set to wm8904 sysclk .\n");
	return tegra_audio_dai_init(rtd);
}

int tegra_codecs_init(struct snd_soc_card *card)
{
	struct snd_soc_dai_link *dai_links = card->dai_link;
	int i;

	if (!dai_links || !card->num_links)
		return -EINVAL;

	for (i = 0; i < card->num_links; i++) {
		if (strstr(dai_links[i].name, "rt565x-playback") ||
		    strstr(dai_links[i].name, "rt5640-playback") ||
		    strstr(dai_links[i].name, "rt565x-codec-sysclk-bclk1") ||
		    strstr(dai_links[i].name, "rt5640-codec-sysclk-bclk1"))
			dai_links[i].init = tegra_machine_rt56xx_init;
		else if (strstr(dai_links[i].name, "fe-pi-audio-z-v2"))
			dai_links[i].init = tegra_machine_fepi_init;
		else if (strstr(dai_links[i].name, "respeaker-4-mic-array"))
			dai_links[i].init = tegra_machine_respeaker_init;
		else if (strstr(dai_links[i].name, "wm8904-playback"))
			dai_links[i].init = tegra_machine_wm8904_init;
	}

	return 0;
}

but dmesg shows [34.651878] wm8904 7-001a: System clock not configured

Hi,
Please share the list of changes you are doing along with
dmesg logs and output of sudo cat /sys/kernel/debug/asoc/components

As there is no response further, please let us know if the issue is resolved.

Yes, the voice is already available, thanks

Thanks for the update.
Please update the solution also and close.

I solved the “wm8904 8-001a: System clock not configured” alarm, but there are still the following alarms, but it does not affect the sound
“tegra-asoc: sound: ASoC: CODEC DAI wm8904-hifi not registered”

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